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path: root/arch/x86/events/intel/rapl.c
AgeCommit message (Expand)AuthorFilesLines
2020-05-28perf/x86/rapl: Move RAPL support to common x86 codeStephane Eranian1-802/+0
2020-05-19perf/x86/rapl: Add Ice Lake RAPL supportKan Liang1-0/+2
2020-03-24x86/perf/events: Convert to new CPU match macrosThomas Gleixner1-31/+27
2020-01-17perf/x86/intel/rapl: Add Comet Lake supportHarry Pan1-0/+2
2019-09-17Merge branch 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds1-14/+14
2019-09-03perf/x86: Make more stuff staticValdis Klētnieks1-1/+1
2019-08-28x86/intel: Aggregate microserver namingPeter Zijlstra1-2/+2
2019-08-28x86/intel: Aggregate big core graphics namingPeter Zijlstra1-2/+2
2019-08-28x86/intel: Aggregate big core mobile namingPeter Zijlstra1-5/+5
2019-08-28x86/intel: Aggregate big core client namingPeter Zijlstra1-5/+5
2019-06-24perf/x86/rapl: Get quirk state from new probe frameworkJiri Olsa1-79/+3
2019-06-24perf/x86/rapl: Get attributes from new probe frameworkJiri Olsa1-89/+0
2019-06-24perf/x86/rapl: Get MSR values from new probe frameworkJiri Olsa1-42/+11
2019-06-24perf/x86/rapl: Get rapl_cntr_mask from new probe frameworkJiri Olsa1-36/+2
2019-06-24perf/x86/rapl: Use new MSR detection interfaceJiri Olsa1-1/+191
2019-06-17perf/x86/intel: Add Icelake desktop CPUIDKan Liang1-0/+1
2019-06-03Merge branch 'x86/topology' into perf/core, to prepare for new patchesIngo Molnar1-10/+10
2019-05-23perf/x86/intel/rapl: Cosmetic rename internal variables in response to multi-...Kan Liang1-7/+7
2019-05-23perf/x86/intel/rapl: Support multi-die/packageKan Liang1-5/+5
2019-05-21treewide: Add SPDX license identifier for more missed filesThomas Gleixner1-0/+1
2019-04-16perf/x86/intel/rapl: Add Icelake supportKan Liang1-0/+2
2019-01-21perf/core, arch/x86: Use PERF_PMU_CAP_NO_EXCLUDE for exclusion incapable PMUsAndrew Murray1-7/+2
2018-10-02x86/cpu: Sanitize FAM6_ATOM namingPeter Zijlstra1-2/+2
2018-03-31perf/x86/intel: Add Cannon Lake support for RAPL profilingHarry Pan1-0/+2
2018-01-12perf/x86/rapl: Fix Haswell and Broadwell server RAPL eventKan Liang1-2/+2
2017-09-25perf/x86/intel/rapl: Add missing CPU IDsKan Liang1-0/+3
2017-08-11x86: Mark various structures and functions as 'static'Colin Ian King1-1/+1
2017-05-03perf/x86: Fix Broadwell-EP DRAM RAPL eventsVince Weaver1-1/+1
2017-03-01x86/events: Remove last remnants of old filenamesBorislav Petkov1-1/+1
2017-02-11perf/x86/intel: Add Kaby Lake supportSrinivas Pandruvada1-0/+3
2017-02-01perf/x86/intel/rapl: Make package handling more robustThomas Gleixner1-34/+26
2017-01-05perf/x86: Set pmu->module in Intel PMU modulesDavid Carrillo-Cisneros1-0/+1
2016-12-25cpu/hotplug: Cleanup state namesThomas Gleixner1-2/+2
2016-10-17perf/x86/intel/rapl: Add Knights Mill CPUIDPiotr Luc1-0/+1
2016-09-10perf/x86/rapl: Enable Apollo Lake RAPL supportHarry Pan1-0/+2
2016-08-18perf/x86: Use PMUEF_READ_CPU_PKG in uncore eventsDavid Carrillo-Cisneros1-0/+2
2016-07-29Merge branch 'smp-hotplug-for-linus' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds1-59/+25
2016-07-14perf/x86/intel/rapl: Convert to hotplug state machineRichard Cochran1-59/+25
2016-06-08perf/x86/rapl: Add Skylake server model detectionJacob Pan1-0/+1
2016-06-08perf/x86/rapl: Use Intel family macros for RAPLDave Hansen1-15/+16
2016-05-25perf/x86/intel/rapl: Fix pmus free during cleanupVincent Stehlé1-1/+1
2016-04-23x86/perf/rapl: Add missing Broadwell modelPeter Zijlstra1-0/+1
2016-04-23x86/perf/rapl: Reorder model numbersPeter Zijlstra1-4/+9
2016-04-23perf/x86/intel/rapl: Support Skylake RAPL domainsSrinivas Pandruvada1-2/+52
2016-04-23Merge branch 'perf/urgent' into perf/core, to resolve conflictIngo Molnar1-0/+1
2016-04-23perf/x86/intel/rapl: Add missing Haswell modelSrinivas Pandruvada1-0/+1
2016-03-31x86/perf/intel/rapl: Make the Intel RAPL PMU driver modularKan Liang1-39/+82
2016-03-21perf/x86/intel/rapl: Add missing Broadwell modelsSrinivas Pandruvada1-0/+2
2016-03-08perf/x86/intel/rapl: Simplify quirk handling even moreBorislav Petkov1-19/+13
2016-02-29perf/x86/intel/rapl: Convert it to a per package facilityThomas Gleixner1-108/+86