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2017-09-25x86/vector: Switch IOAPIC to global reservation modeThomas Gleixner1-23/+33
2017-09-25x86/vector/msi: Switch to global reservation modeThomas Gleixner1-34/+63
2017-09-25x86/vector: Handle managed interrupts properThomas Gleixner1-18/+172
2017-09-25x86/io_apic: Reevaluate vector configuration on activate()Thomas Gleixner1-15/+22
2017-09-25x86/apic/msi: Force reactivation of interrupts at startup timeThomas Gleixner1-2/+3
2017-09-25x86/vector: Untangle internal state from irq_cfgThomas Gleixner1-40/+48
2017-09-25x86/vector: Compile SMP only code conditionallyThomas Gleixner1-15/+20
2017-09-25x86/apic: Remove unused callbacksThomas Gleixner10-153/+0
2017-09-25x86/vector: Use matrix allocator for vector assignmentThomas Gleixner1-172/+116
2017-09-25x86/vector: Add tracepoints for vector managementThomas Gleixner1-0/+2
2017-09-25x86/smpboot: Set online before setting up vectorsThomas Gleixner1-5/+5
2017-09-25x86/vector: Add vector domain debugfs supportThomas Gleixner1-2/+48
2017-09-25x86/irq/vector: Initialize matrix allocatorThomas Gleixner4-5/+56
2017-09-25x86/apic: Add replacement for cpu_mask_to_apicid()Thomas Gleixner9-0/+30
2017-09-25x86/vector: Move helper functions aroundThomas Gleixner1-15/+15
2017-09-25x86/vector: Remove pointless pointer checksThomas Gleixner1-1/+1
2017-09-25x86/apic: Get rid of the legacy irq data storageThomas Gleixner1-39/+13
2017-09-25x86/ioapic: Mark legacy vectors at reallocation timeThomas Gleixner1-0/+1
2017-09-25x86/vector: Simplify vector move cleanupThomas Gleixner1-144/+77
2017-09-25x86/vector: Store the single CPU targets in apic dataThomas Gleixner1-0/+5
2017-09-25x86/vector: Cleanup variable namesThomas Gleixner1-114/+114
2017-09-25x86/vector: Simplify the CPU hotplug vector updateThomas Gleixner1-29/+35
2017-09-25x86/ioapic: Remove obsolete post hotplug updateThomas Gleixner2-43/+0
2017-09-25x86/apic: Get rid of multi CPU affinityThomas Gleixner1-10/+3
2017-09-25x86/vector: Rename used_vectors to system_vectorsThomas Gleixner4-10/+10
2017-09-25x86/apic: Get rid of apic->target_cpusThomas Gleixner11-41/+5
2017-09-25x86/apic/x2apic: Simplify cluster managementThomas Gleixner1-77/+75
2017-09-25x86/apic: Move common APIC callbacksThomas Gleixner2-28/+78
2017-09-25x86/apic: Sanitize 32/64bit APIC callbacksThomas Gleixner3-13/+21
2017-09-25x86/apic: Move APIC noop specific functionsThomas Gleixner1-0/+7
2017-09-25x86/apic: Move probe32 specific APIC functionsThomas Gleixner2-10/+25
2017-09-25x86/apic: Sanitize return value of check_apicid_used()Thomas Gleixner1-2/+2
2017-09-25x86/apic: Sanitize return value of apic.set_apic_id()Thomas Gleixner5-6/+6
2017-09-25x86/apic: Deinline x2apic functionsThomas Gleixner3-2/+49
2017-09-25Merge branch 'irq/core' into x86/apicThomas Gleixner2-6/+8
2017-09-25genirq/irqdomain: Propagate early activationThomas Gleixner1-2/+2
2017-09-25genirq/irqdomain: Update irq_domain_ops.activate() signatureThomas Gleixner2-4/+6
2017-09-25x86/apic: Use lapic_is_integrated() consistentlyDou Liyang1-5/+4
2017-09-25x86/apic: Remove duplicate X86_64 conditional in lapic_is_integrated()Dou Liyang1-4/+0
2017-09-25x86/apic: Remove init_bsp_APIC()Dou Liyang2-52/+0
2017-09-25x86/apic: Initialize interrupt mode after timer initDou Liyang3-6/+8
2017-09-25x86/init: Add intr_mode_init to x86_init_opsDou Liyang3-2/+3
2017-09-25x86/ioapic: Refactor the delay logic in timer_irq_works()Dou Liyang1-2/+43
2017-09-25x86/apic: Unify interrupt mode setup for UP systemDou Liyang1-41/+6
2017-09-25x86/apic: Mark the apic_intr_mode extern for sanity check cleanupDou Liyang2-58/+15
2017-09-25x86/apic: Unify interrupt mode setup for SMP-capable systemDou Liyang2-15/+37
2017-09-25x86/apic: Move logical APIC ID away from apic_bsp_setup()Dou Liyang2-10/+12
2017-09-25x86/apic: Split local APIC timer setup from the APIC setupDou Liyang2-2/+7
2017-09-25x86/apic: Prepare for unifying the interrupt delivery modes setupDou Liyang1-0/+16
2017-09-25x86/apic: Construct a selector for the interrupt delivery modeDou Liyang1-0/+52
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