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path: root/drivers/clk/clk-oxnas.c
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2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201Thomas Gleixner1-12/+1
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms and conditions of the gnu general public license version 2 as published by the free software foundation this program is distributed in the hope it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details you should have received a copy of the gnu general public license along with this program if not see http www gnu org licenses extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 228 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Richard Fontana <rfontana@redhat.com> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190528171438.107155473@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2016-10-23clk: oxnas: Add OX820 Gate clocksNeil Armstrong1-0/+58
Add support for the Oxford Semiconductor OX820 SoC gate clocks along the OX810SE SoC support. This rework on concerns the gate clocks since they are different. Future PLL handling code will be added for OX820. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20161005150752.22618-6-narmstrong@baylibre.com
2016-10-23clk: oxnas: Refactor to make use of devm_clk_hw_register()Neil Armstrong1-64/+84
Make usage of static tables identified by the OF match table to feed devm_clk_hw_register() and use of_clk_add_hw_provider(). This structure is cleaner and simplifies adding new SoC support while having common probe and gate ops code. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20161005150752.22618-5-narmstrong@baylibre.com
2016-10-23clk: oxnas: Rename to clk_oxnas_gateNeil Armstrong1-16/+16
Rename clock ops to clk_oxnas_gate in ops and structures. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20161005150752.22618-4-narmstrong@baylibre.com
2016-07-07clk: oxnas: make it explicitly non-modularPaul Gortmaker1-12/+3
The Kconfig currently controlling compilation of this code is: drivers/clk/Kconfig:config COMMON_CLK_OXNAS drivers/clk/Kconfig: bool "Clock driver for the OXNAS SoC Family" ...meaning that it currently is not being built as a module by anyone. Lets remove the modular code that is essentially orphaned, so that when reading the driver there is no doubt it is builtin-only. We explicitly disallow a driver unbind, since that doesn't have a sensible use case anyway, and it allows us to drop the ".remove" code for non-modular drivers. Since module_platform_driver() uses the same init level priority as builtin_platform_driver() the init ordering remains unchanged with this commit. Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code. Cc: Stephen Boyd <sboyd@codeaurora.org> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Cc: linux-clk@vger.kernel.org Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Michael Turquette <mturquette@baylibre.com> Link: lkml.kernel.org/r/20160704211220.5685-6-paul.gortmaker@windriver.com
2016-06-21clk: Fix return value check in oxnas_stdclk_probe()Wei Yongjun1-2/+2
In case of error, the function syscon_node_to_regmap() returns ERR_PTR() and never returns NULL. The NULL test in the return value check should be replaced with IS_ERR(). Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Acked-by: Neil Armstrong <narmstrong@baylibre.com> Fixes: 0bbd72b4c64f ("clk: Add Oxford Semiconductor OXNAS Standard Clocks") Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-04-22clk: Add Oxford Semiconductor OXNAS Standard ClocksNeil Armstrong1-0/+195
Add Oxford Semiconductor OXNAS SoC Family Standard Clocks support. Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> [sboyd@codeaurora.org: Drop NULL/continue check in registration loop] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>