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path: root/drivers/clk/imx
AgeCommit message (Expand)AuthorFilesLines
2017-06-20clk: imx7d: create clocks behind rawnand clock gateStefan Agner1-2/+4
2017-06-07clk: imx7d: Fix the DDR PLL enable bitFabio Estevam1-1/+1
2017-06-01clk: imx7d: Fix the powerdown bit location of PLL DDRFabio Estevam3-1/+7
2017-04-19clk: imx7d: fix USDHC NAND clockStefan Agner1-2/+1
2017-04-19clk: imx7d: add the missing ipg_root_clkDong Aisheng1-1/+2
2017-04-19clk: clk-imx7d: fix ahb clk definitionDong Aisheng1-3/+2
2017-04-12clk: imx: correct uart4_serial clock name in driver for i.MX6ULRobin van der Gracht1-1/+1
2017-04-12clk: imx: clk-imx6ul: The i.mx6ul has no aips_tz3 clockRobin van der Gracht1-4/+5
2017-01-27Merge branch 'clk-imx7', 'clk-bcm2835' into clk-nextStephen Boyd1-0/+1
2017-01-21clk: imx7d: Add the OCOTP clockFabio Estevam1-0/+1
2017-01-21clk: imx6: don't restrict LDB mux changes on QuadPlusLucas Stach1-8/+13
2017-01-10clk: imx: pllv3: support fractional multiplier on vf610 PLL1/PLL2Nikita Yushchenko3-2/+102
2016-12-16Merge tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/...Linus Torvalds1-26/+26
2016-11-16Merge tag 'imx-clk-4.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sha...Stephen Boyd3-21/+342
2016-11-15clk: imx: clk-imx6ul: add clk support for imx6ullBai Ping1-11/+61
2016-11-02clk: imx: improve precision of AV PLL to 1 HzEmil Lundmark1-0/+8
2016-11-02clk: imx: fix integer overflow in AV PLL round rateEmil Lundmark1-2/+6
2016-11-01clk: imx6: Fix procedure to switch the parent of LDB_DI_CLKFabio Estevam1-5/+259
2016-11-01clk: imx6: Make the LDB_DI0 and LDB_DI1 clocks read-onlyPhilipp Zabel2-8/+10
2016-11-01clk: imx6: Mask mmdc_ch1 handshake for periph2_sel and mmdc_ch1_axi_podfPhilipp Zabel1-0/+15
2016-11-01ARM: clk: imx31: properly init clocks for machines with DTVladimir Zapolskiy1-24/+26
2016-11-01clk: imx31: fix rewritten input argument of mx31_clocks_init()Vladimir Zapolskiy1-3/+1
2016-10-08Merge tag 'armsoc-cleanup' of git://git.kernel.org/pub/scm/linux/kernel/git/a...Linus Torvalds1-41/+5
2016-09-21clk: imx6: initialize GPU clocksLucas Stach1-0/+18
2016-09-21clk: imx6: fix i.MX6DL clock tree to reflect realityLucas Stach1-12/+16
2016-09-21clk: imx53: Add clocks configurationKalle Kankare1-0/+20
2016-09-14ARM: clk-imx35: annotate clk enum with number valuesUwe Kleine-König1-14/+16
2016-09-14ARM: clk-imx35: fix name for ckil clkUwe Kleine-König1-1/+1
2016-08-31clk: imx7d: Add PLL_AUDIO_TEST_DIV/POST_DIV clocksFabio Estevam1-40/+61
2016-08-19clk: imx7d: Add SAI IPG clocksFabio Estevam1-3/+10
2016-08-19clk: imx: Introduce clk_register_gate2()Fabio Estevam1-0/+9
2016-08-19clk: imx7d: Add the clock for SDMAFabio Estevam1-0/+1
2016-08-12clk: imx7d: do not set the parent of IMX7D_ENET_AXI_ROOT_SRCFabio Estevam1-2/+0
2016-08-09ARM: i.MX: Remove i.MX1 non-DT supportAlexander Shiyan1-41/+5
2016-07-13clk: imx7d: do not set parent of ethernet time/ref clocksStefan Agner1-9/+0
2016-07-08clk: imx: vf610: Disable automatic clock gating for lpuart in LPSTOP modeStefan Agner1-6/+6
2016-07-02clk: imx7d: only enable minimum required clocksDong Aisheng1-8/+10
2016-07-02clk: imx7d: using api with flag CLK_OPS_PARENT_ENABLEDong Aisheng1-357/+357
2016-07-02clk: imx: add clk api for supporting CLK_OPS_PARENT_ENABLE clocksDong Aisheng1-0/+32
2016-07-02clk: imx: re-order and concentrate the same type of clk apiDong Aisheng1-29/+29
2016-06-16clk: imx6ul: fix gpt2 clock namesDong Aisheng1-2/+2
2016-06-16clk: imx: refine the powerdown bit of clk-pllv3Dong Aisheng1-10/+10
2016-06-13clk: imx: clk-pllv3: fix incorrect handle of enet powerdown bitDong Aisheng1-4/+4
2016-06-12clk: imx: fix pll clock parentsDong Aisheng5-34/+34
2016-06-12clk: imx7d: correct dram pll typeAnson Huang1-1/+1
2016-06-12clk: imx7d: correct dram root clk parent selectAnson Huang1-1/+1
2016-06-12clk: imx: correct AV PLL rate formulaAnson Huang1-2/+6
2016-05-13Merge tag 'imx-clk-fixes-4.6-2' of git://git.kernel.org/pub/scm/linux/kernel/...Stephen Boyd2-3/+3
2016-05-03clk: imx7d: fix ahb clock mux 1Stefan Agner1-1/+1
2016-04-27clk: imx: return correct frequency for Ethernet PLLStefan Agner1-1/+8