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path: root/drivers/clk/keystone
AgeCommit message (Expand)AuthorFilesLines
2022-06-10treewide: Replace GPLv2 boilerplate/reference with SPDX - gpl-2.0_320.RULEThomas Gleixner1-9/+1
2022-04-23clk: keystone: syscon-clk: Add support for AM62 epwm-tbclkGeorgi Vlaev1-0/+11
2021-06-23clk: keystone: syscon-clk: Add support for AM64 specific epwm-tbclkLokesh Vutla1-0/+17
2021-04-09treewide: Change list_sort to use const pointersSami Tolvanen1-2/+2
2020-09-22clk: keystone: sci-clk: add 10% slack to set_rateTero Kristo1-1/+2
2020-09-22clk: keystone: sci-clk: cache results of last query rate operationTero Kristo1-0/+14
2020-09-22clk: keystone: sci-clk: fix parsing assigned-clock data during probeTero Kristo1-1/+1
2020-07-11Replace HTTP links with HTTPS ones: Common CLK frameworkAlexander A. Klimov2-2/+2
2020-06-13treewide: replace '---help---' in Kconfig files with 'help'Masahiro Yamada1-2/+2
2020-03-21clk: keystone: Add new driver to handle syscon based clocksVignesh Raghavendra3-0/+181
2019-07-17Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds2-38/+212
2019-06-07clk: keystone: sci-clk: extend clock IDs to 32 bitsTero Kristo1-8/+28
2019-06-07clk: keystone: sci-clk: probe clocks from DT instead of firmwareTero Kristo2-0/+141
2019-06-07clk: keystone: sci-clk: split out the fw clock parsing to own functionTero Kristo1-27/+41
2019-06-07clk: keystone: sci-clk: cut down the clock name lengthTero Kristo1-4/+3
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152Thomas Gleixner2-10/+2
2019-05-21treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner2-0/+2
2018-10-19Merge branch 'clk-k3-tisci' into clk-nextStephen Boyd3-1/+11
2018-10-08clk: keystone: add missing MODULE_LICENSEArnd Bergmann2-0/+10
2018-10-02clk: keystone: Enable TISCI clocks if K3_ARCHNishanth Menon1-1/+1
2018-08-30clk: Convert to using %pOFn instead of device_node.nameRob Herring2-2/+2
2018-03-08clk: keystone: sci-clk: add support for dynamically probing clocksTero Kristo1-290/+90
2017-08-03clk: keystone: sci-clk: Fix sci_clk_getTero Kristo1-24/+42
2017-06-23clk: keystone: TI_SCI_PROTOCOL is needed for clk driverArnd Bergmann1-1/+2
2017-06-14clk: keystone: Add sci-clk driver supportTero Kristo3-1/+741
2016-12-09clk: keystone: pll: Unmap region obtained by of_iomapArvind Yadav1-2/+7
2016-11-02clk: keystone: improve function-level documentationJulia Lawall1-2/+2
2015-10-20clk: keystone: fix a trivial typoGeliang Tang1-1/+1
2015-07-28Merge branch 'cleanup-clk-h-includes' into clk-nextStephen Boyd2-2/+0
2015-07-28clk: keystone: make use of of_clk_parent_fill helper functionDinh Nguyen1-2/+1
2015-07-20clk: keystone: Remove clk.h includeStephen Boyd2-2/+0
2015-06-19clk: keystone: add support for post divider register for main pllMurali Karicheri1-2/+18
2014-02-11clk: keystone: gate: fix clk_init_data initializationIvan Khoronzhuk1-0/+1
2013-12-10clk: keystone: gate: fix error handling on initGrygorii Strashko1-4/+8
2013-12-10clk: keystone: use clkod register bits for postdivMurali Karicheri1-4/+20
2013-10-08clk: keystone: Build Keystone clock driversSantosh Shilimkar1-0/+1
2013-10-08clk: keystone: Add gate control clock driverSantosh Shilimkar1-0/+264
2013-10-08clk: keystone: add Keystone PLL clock driverSantosh Shilimkar1-0/+305