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path: root/drivers/clk/mediatek/clk-mt6795-apmixedsys.c
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2023-05-11clk: mediatek: Convert all remaining drivers to platform_driver's .remove_new()Uwe Kleine-König1-4/+2
The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert all mediatek clk drivers from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/20230430190233.878921-4-u.kleine-koenig@pengutronix.de Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-03-13clk: mediatek: Add MODULE_DEVICE_TABLE() where appropriateAngeloGioacchino Del Regno1-0/+1
Add a MODULE_DEVICE_TABLE() on all clocks that can be built as modules to allow auto-load at boot. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Tested-by: Miles Chen <miles.chen@mediatek.com> Tested-by: Chen-Yu Tsai <wenst@chromium.org> # MT8183, MT8192, MT8195 Chromebooks Link: https://lore.kernel.org/r/20230306140543.1813621-50-angelogioacchino.delregno@collabora.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-03-13clk: mediatek: mt6795: Add support for frequency hopping through FHCTLAngeloGioacchino Del Regno1-3/+60
Add FHCTL parameters and register PLLs through FHCTL to add support for frequency hopping and SSC. FHCTL will be enabled only on PLLs specified in devicetree. This commit brings functional changes only upon addition of devicetree configuration. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Link: https://lore.kernel.org/r/20230206100105.861720-5-angelogioacchino.delregno@collabora.com Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2022-09-26clk: mediatek: Add MediaTek Helio X10 MT6795 clock driversAngeloGioacchino Del Regno1-0/+157
Add the clock drivers for the entire clock tree of MediaTek Helio X10 MT6795, including system clocks (apmixedsys, infracfg, pericfg, topckgen) and multimedia clocks (mmsys, mfg, vdecsys, vencsys). Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Link: https://lore.kernel.org/r/20220921091455.41327-9-angelogioacchino.delregno@collabora.com Signed-off-by: Chen-Yu Tsai <wenst@chromium.org>