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path: root/drivers/clk/mediatek/clk-mt7629-eth.c
AgeCommit message (Expand)AuthorFilesLines
2022-06-16clk: mediatek: reset: Add new register reset function with deviceRex-BC Chen1-1/+1
2022-06-16clk: mediatek: reset: Support nonsequence base offsets of reset registersRex-BC Chen1-2/+4
2022-06-16clk: mediatek: reset: Revise structure to control reset registerRex-BC Chen1-1/+7
2022-06-16clk: mediatek: reset: Merge and revise reset register functionRex-BC Chen1-1/+1
2022-05-20clk: mediatek: Replace 'struct clk' with 'struct clk_hw'Chen-Yu Tsai1-4/+4
2018-11-30clk: mediatek: add clock support for MT7629 SoCRyder Lee1-0/+159