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path: root/drivers/clk/mediatek
AgeCommit message (Expand)AuthorFilesLines
2023-03-31clk: mediatek: Add MT8188 infrastructure clock supportGarmin.Chang2-1/+200
2023-03-31clk: mediatek: Add MT8188 peripheral clock supportGarmin.Chang2-1/+61
2023-03-31clk: mediatek: Add MT8188 topckgen clock supportGarmin.Chang2-1/+1351
2023-03-31clk: mediatek: Add MT8188 apmixedsys clock supportGarmin.Chang3-0/+167
2023-03-20clk: mediatek: mt81xx: Ensure fhctl code is availableArnd Bergmann1-0/+3
2023-03-17clk: mediatek: Ensure fhctl code is available for COMMON_CLK_MT6795Stephen Boyd1-0/+1
2023-03-15clk: mediatek: clk-pllfh: fix missing of_node_put() in fhctl_parse_dt()Yang Yingliang1-2/+9
2023-03-13clk: mediatek: mt8135: Convert to simple probe and enable module buildAngeloGioacchino Del Regno2-102/+76
2023-03-13clk: mediatek: mt8135: Join root_clk_alias and top_divs arraysAngeloGioacchino Del Regno1-6/+1
2023-03-13clk: mediatek: mt8135-apmixedsys: Convert to platform_driver and moduleAngeloGioacchino Del Regno1-5/+48
2023-03-13clk: mediatek: mt8135: Properly use CLK_IS_CRITICAL flagAngeloGioacchino Del Regno1-6/+8
2023-03-13clk: mediatek: mt8135: Move apmixedsys to its own fileAngeloGioacchino Del Regno3-47/+63
2023-03-13clk: mediatek: Add MODULE_DEVICE_TABLE() where appropriateAngeloGioacchino Del Regno148-1/+150
2023-03-13clk: mediatek: Kconfig: Allow module build for core mt8192 clocksAngeloGioacchino Del Regno1-1/+1
2023-03-13clk: mediatek: mt8192: Move apmixedsys clock driver to its own fileAngeloGioacchino Del Regno3-218/+219
2023-03-13clk: mediatek: Split configuration options for MT8186 clock driversAngeloGioacchino Del Regno2-6/+91
2023-03-13clk: mediatek: Allow building most MT6797 clock drivers as modulesAngeloGioacchino Del Regno1-4/+4
2023-03-13clk: mediatek: Allow building most MT6765 clock drivers as modulesAngeloGioacchino Del Regno1-13/+13
2023-03-13clk: mediatek: Allow all MT8183 clocks to be built as modulesAngeloGioacchino Del Regno1-12/+12
2023-03-13clk: mediatek: Allow all MT8167 clocks to be built as modulesAngeloGioacchino Del Regno1-8/+8
2023-03-13clk: mediatek: Allow MT7622 clocks to be built as modulesAngeloGioacchino Del Regno1-4/+4
2023-03-13clk: mediatek: Allow building MT8192 non-critical clocks as modulesAngeloGioacchino Del Regno1-12/+12
2023-03-13clk: mediatek: Split MT8195 clock drivers and allow module buildAngeloGioacchino Del Regno2-7/+113
2023-03-13clk: mediatek: mt2712: Change Kconfig options to allow module buildAngeloGioacchino Del Regno1-8/+8
2023-03-13clk: mediatek: Add MODULE_LICENSE() where missingAngeloGioacchino Del Regno109-1/+109
2023-03-13clk: mediatek: Switch to module_platform_driver() where possibleAngeloGioacchino Del Regno96-149/+98
2023-03-13clk: mediatek: mt8186-mcu: Migrate to common probe mechanismAngeloGioacchino Del Regno1-55/+13
2023-03-13clk: mediatek: mt7986-eth: Migrate to common probe mechanismAngeloGioacchino Del Regno1-51/+32
2023-03-13clk: mediatek: mt7986-infracfg: Migrate to common probe mechanismAngeloGioacchino Del Regno1-44/+17
2023-03-13clk: mediatek: mt7986-apmixed: Use PLL_AO flag to set critical clockAngeloGioacchino Del Regno1-3/+1
2023-03-13clk: mediatek: Propagate struct device with mtk_clk_register_dividers()AngeloGioacchino Del Regno4-6/+9
2023-03-13clk: mediatek: mt8516: Allow building clock drivers as modulesAngeloGioacchino Del Regno1-2/+2
2023-03-13clk: mediatek: mt8516: Convert to platform driver and simple probeAngeloGioacchino Del Regno2-66/+57
2023-03-13clk: mediatek: mt8516: Move apmixedsys clock driver to its own fileAngeloGioacchino Del Regno3-82/+122
2023-03-13clk: mediatek: mt7622: Convert to platform driver and simple probeAngeloGioacchino Del Regno1-94/+31
2023-03-13clk: mediatek: mt7622: Move infracfg to clk-mt7622-infracfg.cAngeloGioacchino Del Regno3-74/+134
2023-03-13clk: mediatek: mt7622-apmixedsys: Add .remove() callback for module buildAngeloGioacchino Del Regno1-1/+15
2023-03-13clk: mediatek: mt7622: Move apmixedsys clock driver to its own fileAngeloGioacchino Del Regno3-88/+138
2023-03-13clk: mediatek: mt7622: Properly use CLK_IS_CRITICAL flagAngeloGioacchino Del Regno1-20/+15
2023-03-13clk: mediatek: Consistently use GATE_MTK() macroAngeloGioacchino Del Regno47-839/+223
2023-03-13clk: mediatek: mt8183: Convert all remaining clocks to common probeAngeloGioacchino Del Regno1-132/+34
2023-03-13clk: mediatek: mt8183: Compress clocks arrays entries where possibleAngeloGioacchino Del Regno1-300/+150
2023-03-13clk: mediatek: mt8183: Move apmixedsys clock driver to its own fileAngeloGioacchino Del Regno3-154/+194
2023-03-13clk: mediatek: mt8167: Convert to mtk_clk_simple_{probe,remove}()AngeloGioacchino Del Regno5-113/+101
2023-03-13clk: mediatek: mt8167: Remove __initconst annotation from arraysAngeloGioacchino Del Regno5-54/+54
2023-03-13clk: mediatek: mt8167: Move apmixedsys as platform_driver in new fileAngeloGioacchino Del Regno3-103/+144
2023-03-13clk: mediatek: mt8167: Compress GATE_TOPx macrosAngeloGioacchino Del Regno1-64/+16
2023-03-13clk: mediatek: mt8365: Convert to mtk_clk_simple_{probe,remove}()AngeloGioacchino Del Regno1-204/+37
2023-03-13clk: mediatek: mt8365: Join top_misc_mux_gates and top_misc_muxes arraysAngeloGioacchino Del Regno1-32/+14
2023-03-13clk: mediatek: mt8365: Convert simple_gate to mtk_gate clocksAngeloGioacchino Del Regno1-107/+82
generated by cgit v1.2.3 (git 2.39.0) at 2024-07-10 17:18:16 +0300