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path: root/drivers/clk/mediatek
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2022-05-20clk: mediatek: mt8173: Switch to clk_hw provider APIsChen-Yu Tsai1-5/+4
2022-05-20clk: mediatek: Switch to clk_hw provider APIsChen-Yu Tsai8-122/+123
2022-05-20clk: mediatek: Replace 'struct clk' with 'struct clk_hw'Chen-Yu Tsai94-444/+438
2022-05-20clk: mediatek: apmixed: Drop error message from clk_register() failureChen-Yu Tsai1-3/+1
2022-05-20clk: mediatek: Make mtk_clk_register_composite() staticChen-Yu Tsai2-4/+1
2022-05-19clk: mediatek: use en_mask as a pure div_en_maskChun-Jie Chen14-131/+127
2022-05-19clk: mediatek: update compatible string for MT7986 ethsysSam Shih1-1/+1
2022-04-26clk: mediatek: Add MT8186 ipesys clock supportChun-Jie Chen2-1/+56
2022-04-26clk: mediatek: Add MT8186 mdpsys clock supportChun-Jie Chen2-1/+81
2022-04-26clk: mediatek: Add MT8186 camsys clock supportChun-Jie Chen2-1/+92
2022-04-26clk: mediatek: Add MT8186 vencsys clock supportChun-Jie Chen2-1/+52
2022-04-26clk: mediatek: Add MT8186 vdecsys clock supportChun-Jie Chen2-1/+89
2022-04-26clk: mediatek: Add MT8186 imgsys clock supportChun-Jie Chen2-1/+70
2022-04-26clk: mediatek: Add MT8186 wpesys clock supportChun-Jie Chen2-1/+52
2022-04-26clk: mediatek: Add MT8186 mmsys clock supportChun-Jie Chen2-1/+112
2022-04-26clk: mediatek: Add MT8186 mfgsys clock supportChun-Jie Chen2-1/+50
2022-04-26clk: mediatek: Add MT8186 imp i2c wrapper clock supportChun-Jie Chen2-1/+68
2022-04-26clk: mediatek: Add MT8186 apmixedsys clock supportChun-Jie Chen2-1/+135
2022-04-26clk: mediatek: Add MT8186 infrastructure clock supportChun-Jie Chen2-1/+217
2022-04-26clk: mediatek: Add MT8186 topckgen clock supportChun-Jie Chen2-1/+781
2022-04-26clk: mediatek: Add MT8186 mcusys clock supportChun-Jie Chen3-0/+117
2022-02-17clk: mediatek: Warn if clk IDs are duplicatedChen-Yu Tsai5-6/+34
2022-02-17clk: mediatek: mt8195: Implement remove functionsChen-Yu Tsai5-0/+83
2022-02-17clk: mediatek: mt8195: Implement error handling in probe functionsChen-Yu Tsai5-18/+61
2022-02-17clk: mediatek: mt8195: Hook up mtk_clk_simple_remove()Chen-Yu Tsai14-0/+14
2022-02-17clk: mediatek: Unregister clks in mtk_clk_simple_probe() error pathChen-Yu Tsai1-1/+3
2022-02-17clk: mediatek: mtk: Implement error handling in register APIsChen-Yu Tsai2-35/+103
2022-02-17clk: mediatek: pll: Implement error handling in register APIChen-Yu Tsai2-7/+22
2022-02-17clk: mediatek: mux: Implement error handling in register APIChen-Yu Tsai1-1/+14
2022-02-17clk: mediatek: mux: Reverse check for existing clk to reduce nesting levelChen-Yu Tsai1-7/+8
2022-02-17clk: mediatek: gate: Implement error handling in register APIChen-Yu Tsai1-1/+14
2022-02-17clk: mediatek: cpumux: Implement error handling in register APIChen-Yu Tsai1-1/+14
2022-02-17clk: mediatek: mtk: Clean up included headersChen-Yu Tsai2-13/+12
2022-02-17clk: mediatek: Add mtk_clk_simple_remove()Chen-Yu Tsai2-0/+16
2022-02-17clk: mediatek: Implement mtk_clk_unregister_composites() APIChen-Yu Tsai2-0/+48
2022-02-17clk: mediatek: Implement mtk_clk_unregister_divider_clks() APIChen-Yu Tsai2-3/+24
2022-02-17clk: mediatek: Implement mtk_clk_unregister_factors() APIChen-Yu Tsai2-2/+24
2022-02-17clk: mediatek: Implement mtk_clk_unregister_fixed_clks() APIChen-Yu Tsai2-2/+24
2022-02-17clk: mediatek: pll: Clean up included headersChen-Yu Tsai1-5/+7
2022-02-17clk: mediatek: pll: Implement unregister APIChen-Yu Tsai2-0/+57
2022-02-17clk: mediatek: pll: Split definitions into separate header fileChen-Yu Tsai19-57/+91
2022-02-17clk: mediatek: mux: Clean up included headersChen-Yu Tsai2-5/+14
2022-02-17clk: mediatek: mux: Internalize struct mtk_clk_muxChen-Yu Tsai2-8/+8
2022-02-17clk: mediatek: mux: Implement unregister APIChen-Yu Tsai2-0/+38
2022-02-17clk: mediatek: cpumux: Clean up included headersChen-Yu Tsai2-0/+7
2022-02-17clk: mediatek: cpumux: Internalize struct mtk_clk_cpumuxChen-Yu Tsai2-8/+8
2022-02-17clk: mediatek: cpumux: Implement unregister APIChen-Yu Tsai2-0/+34
2022-02-17clk: mediatek: gate: Clean up included headersChen-Yu Tsai2-11/+10
2022-02-17clk: mediatek: gate: Implement unregister APIChen-Yu Tsai2-0/+38
2022-02-17clk: mediatek: gate: Internalize clk implementationChen-Yu Tsai2-41/+25