kernel/linux.git - Linux kernel stable tree (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2021-03-04	clk: meson: clk-pll: fix initializing the old rate (fallback) for a PLL	Martin Blumenstingl	1	-1/+1
2020-01-27	clk: meson: axg: spread spectrum is on mpll2	Jerome Brunet	1	-5/+5
2020-01-27	clk: meson: gxbb: no spread spectrum on mpll0	Jerome Brunet	1	-5/+0
2019-12-13	clk: meson: meson8b: fix the offset of vid_pll_dco's N value	Martin Blumenstingl	1	-1/+1
2019-12-13	clk: meson: Fix GXL HDMI PLL fractional bits width	Neil Armstrong	1	-1/+7
2019-12-05	clk: meson: gxbb: let sar_adc_clk_div set the parent clock rate	Martin Blumenstingl	1	-0/+1
2019-05-10	clk: meson-gxbb: round the vdec dividers to closest	Maxime Jourdan	1	-0/+2
2019-04-17	Revert "clk: meson: clean-up clock registration"	Neil Armstrong	1	-10/+5
2019-04-05	clk: meson: clean-up clock registration	Jerome Brunet	1	-5/+10
2019-02-12	clk: meson: meson8b: mark the CPU clock as CLK_IS_CRITICAL	Martin Blumenstingl	1	-1/+2
2019-02-12	clk: meson: meson8b: fix the width of the cpu_scale_div clock	Martin Blumenstingl	1	-1/+1
2019-02-12	clk: meson: meson8b: do not use cpu_div3 for cpu_scale_out_sel	Martin Blumenstingl	1	-2/+9
2019-01-26	clk: meson: meson8b: fix incorrect divider mapping in cpu_scale_table	Martin Blumenstingl	1	-7/+8
2018-11-27	clk: meson: clk-pll: drop CLK_GET_RATE_NOCACHE where unnecessary	Jerome Brunet	3	-8/+8
2018-11-27	clk: meson-axg: pcie: drop the mpll3 clock parent	Yixun Lan	1	-2/+4
2018-11-21	clk: meson: axg: mark fdiv2 and fdiv3 as critical	Jerome Brunet	1	-0/+13
2018-11-21	clk: meson-gxbb: set fclk_div3 as CLK_IS_CRITICAL	Christian Hewitt	1	-0/+12
2018-07-09	clk: meson: add gen_clk	Jerome Brunet	4	-3/+135
2018-07-09	clk: meson: gxbb: remove HHI_GEN_CLK_CTNL duplicate definition	Jerome Brunet	1	-1/+0
2018-07-09	clk: meson-axg: add clocks required by pcie driver	Yixun Lan	2	-1/+150
2018-07-09	clk: meson: remove unused clk-audio-divider driver	Jerome Brunet	3	-119/+1
2018-07-09	clk: meson: stop rate propagation for audio clocks	Jerome Brunet	1	-9/+7
2018-07-09	clk: meson: axg: add the audio clock controller driver	Jerome Brunet	4	-0/+982
2018-07-09	clk: meson: add axg audio sclk divider driver	Jerome Brunet	3	-1/+252
2018-07-09	clk: meson: add triple phase clock driver	Jerome Brunet	4	-0/+94
2018-07-09	clk: meson: add clk-phase clock driver	Jerome Brunet	3	-0/+72
2018-07-09	clk: meson: clean-up meson clock configuration	Jerome Brunet	1	-9/+5
2018-07-09	clk: meson: remove obsolete register access	Jerome Brunet	2	-69/+4
2018-06-21	clk: meson: audio-divider is one based	Jerome Brunet	1	-1/+1
2018-06-19	clk: meson-gxbb: set fclk_div2 as CLK_IS_CRITICAL	Neil Armstrong	1	-0/+1
2018-06-09	Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...	Linus Torvalds	20	-309/+586
2018-05-21	clk: meson: axg: let mpll clocks round closest	Jerome Brunet	1	-0/+4
2018-05-21	clk: meson: mpll: add round closest support	Jerome Brunet	2	-5/+22
2018-05-21	clk: meson: meson8b: mark fclk_div2 gate clocks as CLK_IS_CRITICAL	Martin Blumenstingl	1	-0/+7
2018-05-18	clk: meson: use SPDX license identifiers consistently	Jerome Brunet	13	-238/+20
2018-05-15	clk: meson: drop CLK_SET_RATE_PARENT flag	Yixun Lan	1	-1/+1
2018-05-15	clk: meson-axg: Add AO Clock and Reset controller driver	Qiufang Dai	4	-1/+195
2018-05-15	clk: meson: aoclk: refactor common code into dedicated file	Yixun Lan	6	-62/+160
2018-05-15	clk: meson: migrate to devm_of_clk_add_hw_provider API	Yixun Lan	1	-1/+1
2018-05-15	clk: meson: gxbb: add the video decoder clocks	Maxime Jourdan	2	-1/+119
2018-05-15	clk: meson: meson8b: add support for the NAND clocks	Martin Blumenstingl	2	-1/+58
2018-05-02	Merge tag 'meson-clk-fixes-4.17-1' of https://github.com/BayLibre/clk-meson i...	Stephen Boyd	2	-4/+3
2018-04-25	clk: meson: meson8b: fix meson8b_cpu_clk parent clock name	Martin Blumenstingl	1	-1/+2
2018-04-25	clk: meson: meson8b: fix meson8b_fclk_div3_div clock name	Martin Blumenstingl	1	-1/+1
2018-04-25	clk: meson: drop meson_aoclk_gate_regmap_ops	Yixun Lan	1	-2/+0
2018-04-16	clk: meson: honor CLK_MUX_ROUND_CLOSEST in clk_regmap	Jerome Brunet	1	-1/+10
2018-03-15	clk: meson: Drop unused local variable and add static	Stephen Boyd	3	-11/+10
2018-03-13	clk: meson: clean-up clk81 clocks	Jerome Brunet	2	-8/+4
2018-03-13	clk: meson: add fdiv clock gates	Jerome Brunet	6	-33/+278
2018-03-13	clk: meson: add mpll pre-divider	Jerome Brunet	6	-13/+65