kernel/linux.git - Linux kernel stable tree (mirror)

Age	Commit message (Collapse)	Author	Files	Lines
2022-10-27	clk: mstar: msc313 cpupll clk driver	Daniel Palmer	1	-0/+1
	Add a driver for the CPU pll/ARM pll/MIPS pll that is present in MStar SoCs. Currently there is no documentation for this block so it's possible this driver isn't entirely correct. Only tested on the version of this IP in the MStar/SigmaStar ARMv7 SoCs. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Co-developed-by: Willy Tarreau <w@1wt.eu> Signed-off-by: Willy Tarreau <w@1wt.eu> Signed-off-by: Romain Perier <romain.perier@gmail.com> Link: https://lore.kernel.org/r/20221022133404.3832-2-romain.perier@gmail.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-14	clk: mstar: MStar/SigmaStar MPLL driver	Daniel Palmer	1	-0/+6
	This adds a basic driver for the MPLL block found in MStar/SigmaStar ARMv7 SoCs. Currently this driver is only good for calculating the rates of it's outputs and the actual configuration must be done before the kernel boots. Usually this is done even before u-boot starts. This driver targets the MPLL block found in the MSC313/MSC313E but there is no documentation this chip so the register descriptions for the another MStar chip the MST786 were used as they seem to match. Signed-off-by: Daniel Palmer <daniel@0x0f.com> Link: https://lore.kernel.org/r/20210211052206.2955988-5-daniel@0x0f.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>