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path: root/drivers/clk/qcom/a7-pll.c
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2021-04-09clk: qcom: a7-pll: Add missing MODULE_DEVICE_TABLEChen Hui1-0/+1
CONFIG_QCOM_A7PLL is tristate option and therefore this driver can be compiled as a module. This patch adds missing MODULE_DEVICE_TABLE definition which generates correct modalias for automatic loading of this driver when it is built as an external module. Fixes: 5a5223ffd7ef ("clk: qcom: Add A7 PLL support") Signed-off-by: Chen Hui <clare.chenhui@huawei.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210409082352.233810-2-clare.chenhui@huawei.com Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08clk: qcom: Add A7 PLL supportManivannan Sadhasivam1-0/+100
Add support for PLL found in Qualcomm SDX55 platforms which is used to provide clock to the Cortex A7 CPU via a mux. This PLL can provide high frequency clock to the CPU above 1GHz as compared to the other sources like GPLL0. In this driver, the power domain is attached to the cpudev. This is required for CPUFreq functionality and there seems to be no better place to do other than this driver (no dedicated CPUFreq driver). Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118041156.50016-5-manivannan.sadhasivam@linaro.org Signed-off-by: Stephen Boyd <sboyd@kernel.org>