summaryrefslogtreecommitdiff
path: root/drivers/clk/qcom/apcs-sdx55.c
AgeCommit message (Collapse)AuthorFilesLines
2023-03-13clk: qcom: Convert to platform remove callback returning voidUwe Kleine-König1-4/+2
The .remove() callback for a platform driver returns an int which makes many driver authors wrongly assume it's possible to do error handling by returning an error code. However the value returned is (mostly) ignored and this typically results in resource leaks. To improve here there is a quest to make the remove callback return void. In the first step of this quest all drivers are converted to .remove_new() which already returns void. Trivially convert this driver from always returning zero in the remove callback to the void returning variant. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230312161512.2715500-23-u.kleine-koenig@pengutronix.de
2021-06-02clk: qcom: cleanup some dev_err_probe() callsDan Carpenter1-2/+4
The dev_err_probe() function prints an error message if the error code is not -EPROBE_DEFER. If we know the error code in is -ENODEV then there is no reason to check. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/YJotlJBJ1CVAgvMT@mwanda Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-06-02clk: qcom: Simplify usage of dev_err_probe()Uwe Kleine-König1-14/+8
dev_err_probe() returns the error code passed as second parameter. Also if the error code is -EPROBE_DEFER dev_err_probe() is silent, so there is no need to check for this value before calling dev_err_probe(). Signed-off-by: Uwe Kleine-König <uwe@kleine-koenig.org> Link: https://lore.kernel.org/r/20210427164522.2886825-1-uwe@kleine-koenig.org Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2021-02-08clk: qcom: Add SDX55 APCS clock controller supportManivannan Sadhasivam1-0/+149
Add a driver for the SDX55 APCS clock controller. It is part of the APCS hardware block, which among other things implements also a combined mux and half integer divider functionality. The APCS clock controller has 3 parent clocks: 1. Board XO 2. Fixed rate GPLL0 3. A7 PLL This is required for enabling CPU frequency scaling on SDX55-based platforms. Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210118041156.50016-6-manivannan.sadhasivam@linaro.org [sboyd@kernel.org: Fix unused ret in probe by hardcoding it] Signed-off-by: Stephen Boyd <sboyd@kernel.org>