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path: root/drivers/clk/qcom/clk-pll.c
AgeCommit message (Expand)AuthorFilesLines
2016-11-02clk: qcom: Enable FSM mode for votable alpha PLLsRajendra Nayak1-28/+3
2015-08-25clk: qcom: Convert to clk_hw based provider APIsStephen Boyd1-6/+2
2015-07-28Merge branch 'clk-determine-rate-struct' into clk-nextStephen Boyd1-7/+11
2015-07-28clk: change clk_ops' ->determine_rate() prototypeBoris Brezillon1-7/+11
2015-07-08clk: qcom: Add support for SR2 PLLsGeorgi Djakov1-0/+75
2015-03-27clk: qcom: fix simple_return.cocci warningsFengguang Wu1-5/+1
2015-02-03clk: Add rate constraints to clocksTomeu Vizoso1-0/+1
2014-12-04clk: Change clk_ops->determine_rate to return a clk_hw as the best parentTomeu Vizoso1-1/+1
2014-09-23clk: qcom: Add support for setting rates on PLLsStephen Boyd1-1/+67
2014-07-16clk: qcom: pll: Add support for configuring SR PLLsStephen Boyd1-3/+12
2014-01-17clk: qcom: Add support for phase locked loops (PLLs)Stephen Boyd1-0/+222