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path: root/drivers/clk/socfpga/clk-gate-a10.c
AgeCommit message (Expand)AuthorFilesLines
2023-03-22clk: socfpga: arria10: use of_clk_add_hw_provider and improve error handlingMarco Pagani1-7/+19
2022-12-07clk: socfpga: remove the setting of clk-phase for sdmmc_clkDinh Nguyen1-68/+0
2021-04-08clk: socfpga: arria10: Fix memory leak of socfpga_clk on error returnColin Ian King1-0/+1
2021-03-31clk: socfpga: arria10: convert to use clk_hwDinh Nguyen1-4/+4
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 201Thomas Gleixner1-12/+1
2017-06-20clk: socfpga: Fix the smplsel on Arria10 and Stratix10Dinh Nguyen1-1/+1
2016-02-23clk: socfpga: allow for multiple parents on Arria10 periph clocksDinh Nguyen1-5/+1
2015-07-28clk: socfpga: switch to GENMASK()Andy Shevchenko1-1/+1
2015-07-20clk: socfpga: Remove clk.h and clkdev.h includesStephen Boyd1-0/+1
2015-06-10clk: socfpga: remove a stray tabDan Carpenter1-1/+1
2015-05-22clk: socfpga: add a clock driver for the Arria 10 platformDinh Nguyen1-0/+190