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path: root/drivers/clk/sunxi-ng/ccu-sun8i-a33.c
AgeCommit message (Expand)AuthorFilesLines
2021-11-23clk: sunxi-ng: Convert early providers to platform driversSamuel Holland1-10/+30
2021-09-13clk: sunxi-ng: Unregister clocks/resets when unbindingSamuel Holland1-1/+1
2019-07-17Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds1-12/+22
2019-06-18clk: sunxi-ng: a33: Use local parent references for CLK_FIXED_FACTORChen-Yu Tsai1-12/+22
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 282Thomas Gleixner1-9/+1
2019-05-15clk: Remove io.h from clk-provider.hStephen Boyd1-0/+1
2018-12-05clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for all audio module clocksChen-Yu Tsai1-3/+3
2018-12-05clk: sunxi-ng: a33: Use sigma-delta modulation for audio PLLChen-Yu Tsai1-13/+24
2017-07-22clk: Convert to using %pOF instead of full_nameRob Herring1-2/+1
2017-06-07clk: sunxi-ng: Support multiple variable pre-dividersChen-Yu Tsai1-5/+5
2017-04-19Merge tag 'sunxi-clk-for-4.12' of https://git.kernel.org/pub/scm/linux/kernel...Stephen Boyd1-7/+11
2017-04-13clk: sunxi-ng: a33: gate then ungate PLL CPU clk after rate changeChen-Yu Tsai1-0/+11
2017-04-05clk: sunxi-ng: a33: Add offset and minimum value for DDR1 PLL N factorChen-Yu Tsai1-7/+11
2017-01-27clk: sunxi-ng: a33: Set CLK_SET_RATE_PARENT for the GPUMaxime Ripard1-1/+1
2017-01-17clk: sunxi-ng: a33: Add CLK_SET_RATE_PARENT to ac-digMylène Josserand1-1/+1
2017-01-03clk: sunxi-ng: set the parent rate when adjustin CPUX clock on A33Icenowy Zheng1-1/+1
2017-01-03clk: sunxi-ng: fix PLL_CPUX adjusting on A33Icenowy Zheng1-0/+10
2016-11-23clk: sunxi-ng: enable so-said LDOs for A33 SoC's pll-mipi clockIcenowy Zheng1-1/+1
2016-09-21clk: sunxi-ng: Fix reset offset for the A23 and A33Maxime Ripard1-8/+8
2016-09-10clk: sunxi-ng: Add A33 CCU supportMaxime Ripard1-0/+780