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path: root/drivers/clk
AgeCommit message (Expand)AuthorFilesLines
2021-02-06clk: rockchip: use clock ids for PCLK_DPHYRX and PCLK_DPHYTX0 on rk3368Heiko Stuebner1-2/+2
2021-01-30clk: imx: Move 'imx6sl_set_wait_clk()'s prototype out to accessible headerLee Jones1-0/+1
2021-01-30clk: imx8mn: add clkout1/2 supportLucas Stach1-0/+12
2021-01-30clk: imx8mm: add clkout1/2 supportLucas Stach1-0/+12
2021-01-30clk: imx8mq: add PLL monitor outputLucas Stach1-0/+22
2021-01-29clk: imx: clk-imx31: Remove unused static const table 'uart_clks'Lee Jones1-10/+0
2021-01-29clk: imx6q: demote warning about pre-boot ldb_di_clk reparentingAhmad Fatoum1-3/+3
2021-01-28Merge tag 'clk-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds4-24/+9
2021-01-28clk: sunxi-ng: Add support for the Allwinner H616 CCUAndre Przywara4-0/+1212
2021-01-28clk: sunxi-ng: Add support for the Allwinner H616 R-CCUAndre Przywara2-1/+49
2021-01-28clk: renesas: cpg-mssr: Fix formatting issues for 'smstpcr_saved's documentationLee Jones1-2/+2
2021-01-27PM: clk: make PM clock layer compatible with clocks that must sleepNicolas Pitre1-0/+21
2021-01-26clk: rockchip: Demote non-conformant kernel-doc header in half-dividerLee Jones1-1/+1
2021-01-26clk: rockchip: Demote kernel-doc abuses to standard comment blocks in pllsLee Jones1-3/+3
2021-01-26clk: rockchip: Remove unused/undocumented struct members from clk-cpuLee Jones1-4/+0
2021-01-26clk: rockchip: Demote non-conformant kernel-doc headers in main clock codeLee Jones1-2/+2
2021-01-25clk: renesas: r8a779a0: Add RAVB clocksWolfram Sang1-0/+6
2021-01-25clk: renesas: r8a779a0: Add I2C clocksWolfram Sang1-0/+7
2021-01-20clk: sunxi-ng: h6: Fix clock divider range on some clocksAndre Przywara1-4/+4
2021-01-20clk: sunxi: clk-mod0: Demote non-conformant kernel-doc headerLee Jones1-1/+1
2021-01-20clk: sunxi: clk-a10-ve: Demote obvious kernel-doc abuseLee Jones1-1/+1
2021-01-20clk: sunxi: clk-sunxi: Demote a bunch of non-conformant kernel-doc headersLee Jones1-16/+16
2021-01-12clk: mmp2: fix build without CONFIG_PMArnd Bergmann1-2/+4
2021-01-12clk: qcom: gcc-sm250: Use floor ops for sdcc clksDmitry Baryshkov1-2/+2
2021-01-12clk: imx: fix Kconfig warning for i.MX SCU clkArnd Bergmann1-2/+0
2021-01-12clk: qcom: gcc-sc7180: Mark the camera abh clock always ONTaniya Das1-18/+3
2021-01-12clk: tegra30: Add hda clock default rates to clock driverPeter Geis1-0/+2
2021-01-12clk: renesas: r8a779a0: Add SYS-DMAC clocksGeert Uytterhoeven1-0/+2
2021-01-12clk: renesas: r8a779a0: Add SDHI supportWolfram Sang2-2/+16
2021-01-12clk: renesas: rcar-gen3: Factor out CPG libraryWolfram Sang5-251/+309
2021-01-12clk: renesas: rcar-gen3: Remove cpg_quirks access when registering SD clockWolfram Sang1-9/+10
2021-01-12clk: renesas: r8a779a0: Add MSIOF clocksGeert Uytterhoeven1-0/+6
2021-01-12clk: renesas: r8a779a0: Add PFC/GPIO clocksGeert Uytterhoeven1-0/+5
2021-01-07clk: renesas: r8a779a0: Fix parent of CBFUSA clockGeert Uytterhoeven1-1/+1
2021-01-07clk: renesas: r8a779a0: Remove non-existent S2 clockGeert Uytterhoeven1-1/+0
2021-01-07clk: renesas: r8a779a0: Add HSCIF supportWolfram Sang1-0/+4
2021-01-06clk: sunxi-ng: h6: Fix CEC clockAndre Przywara1-1/+1
2021-01-06clk: sunxi-ng: h6-r: Add R_APB2_RSB clock and resetSamuel Holland2-1/+6
2021-01-05memory: tegra124-emc: Make driver modularDmitry Osipenko5-15/+75
2021-01-05clk: imx: clk-imx8qxp: Add some SCU clocks support for MIPI-LVDS subsystemsLiu Ying1-0/+10
2021-01-05clk: imx: clk-imx8qxp: Register DC0 display clocks with imx_clk_scu2()Liu Ying1-2/+10
2021-01-05clk: imx: clk-imx8qxp: Add SCU clocks support for DC0 bypass clocksLiu Ying1-0/+2
2021-01-05clk: imx: clk-imx8qxp: Add SCU clocks support for DC0 PLL clocksLiu Ying1-0/+2
2021-01-04clk: meson: meson8b: remove compatibility code for old .dtbsMartin Blumenstingl1-40/+5
2021-01-04clk: meson: clk-pll: propagate the error from meson_clk_pll_set_rate()Martin Blumenstingl1-2/+3
2021-01-04clk: meson: clk-pll: make "ret" a signed integerMartin Blumenstingl1-1/+2
2021-01-04clk: meson: clk-pll: fix initializing the old rate (fallback) for a PLLMartin Blumenstingl1-1/+1
2020-12-28clk: renesas: r8a779a0: Add RWDT clocksWolfram Sang1-0/+9
2020-12-28clk: renesas: r8a779a0: Add VSPX clock supportKieran Bingham1-0/+4
2020-12-28clk: renesas: r8a779a0: Add VSPD clock supportKieran Bingham1-0/+2