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2021-10-21counter: Fix use-after-free race condition for events_queue_size writeWilliam Breathitt Gray2-4/+13
A race condition is possible when writing to events_queue_size where the events kfifo is freed during the execution of a kfifo_in(), resulting in a use-after-free. This patch prevents such a scenario by protecting the events queue in operation with a spinlock and locking before performing the events queue size adjustment. The existing events_lock mutex is renamed to events_out_lock to reflect that it only protects events queue out operations. Because the events queue in operations can occur in an interrupt context, a new events_in_lock spinlock is introduced and utilized. Fixes: feff17a550c7 ("counter: Implement events_queue_size sysfs attribute") Cc: David Lechner <david@lechnology.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/20211021103540.955639-1-vilhelm.gray@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-10-21counter: Cleanup lingering atomic.h includesWilliam Breathitt Gray2-2/+0
With the removal of the chrdev_lock atomic flag, the counter-sysfs.c and counter-chrdev.c no longer needs to include the atomic.h header file. Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/20211021103514.955622-1-vilhelm.gray@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-10-19counter: drop chrdev_lockDavid Lechner2-16/+3
This removes the chrdev_lock from the counter subsystem. This was intended to prevent opening the chrdev more than once. However, this doesn't work in practice since userspace can duplicate file descriptors and pass file descriptors to other processes. Since this protection can't be relied on, it is best to just remove it. Suggested-by: Greg KH <gregkh@linuxfoundation.org> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: David Lechner <david@lechnology.com> Link: https://lore.kernel.org/r/20211017185521.3468640-1-david@lechnology.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-10-19counter/counter-sysfs: use sysfs_emit everywhereDavid Lechner1-4/+4
In the counter subsystem, we are already using sysfs_emit(), but there were a few places where we were still using sprintf() in *_show() functions. For consistency and added protections, use sysfs_emit() everywhere. Suggested-by: Greg KH <gregkh@linuxfoundation.org> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: David Lechner <david@lechnology.com> Link: https://lore.kernel.org/r/20211017190106.3472645-1-david@lechnology.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-10-17counter: microchip-tcb-capture: Tidy up a false kernel-doc /** marking.Jonathan Cameron1-1/+1
Deals with W=1 warning This comment starts with '/**', but isn't a kernel-doc comment. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Cc: Kamel Bouhara <kamel.bouhara@bootlin.com> Cc: William Breathitt Gray <vilhelm.gray@gmail.com> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/20210930170347.101153-1-jic23@kernel.org
2021-10-17counter: 104-quad-8: Add IRQ support for the ACCES 104-QUAD-8William Breathitt Gray2-9/+164
The LSI/CSI LS7266R1 chip provides programmable output via the FLG pins. When interrupts are enabled on the ACCES 104-QUAD-8, they occur whenever FLG1 is active. Four functions are available for the FLG1 signal: Carry, Compare, Carry-Borrow, and Index. Carry: Interrupt generated on active low Carry signal. Carry signal toggles every time the respective channel's counter overflows. Compare: Interrupt generated on active low Compare signal. Compare signal toggles every time respective channel's preset register is equal to the respective channel's counter. Carry-Borrow: Interrupt generated on active low Carry signal and active low Borrow signal. Carry signal toggles every time the respective channel's counter overflows. Borrow signal toggles every time the respective channel's counter underflows. Index: Interrupt generated on active high Index signal. These four functions correspond respectivefly to the following four Counter event types: COUNTER_EVENT_OVERFLOW, COUNTER_EVENT_THRESHOLD, COUNTER_EVENT_OVERFLOW_UNDERFLOW, and COUNTER_EVENT_INDEX. Interrupts push Counter events to event channel X, where 'X' is the respective channel whose FLG1 activated. This patch adds IRQ support for the ACCES 104-QUAD-8. The interrupt line numbers for the devices may be configured via the irq array module parameter. Acked-by: Syed Nayyar Waris <syednwaris@gmail.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/e3a28e100840e3a336fa93fce77445f0e9d9a674.1632884256.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-10-17counter: 104-quad-8: Replace mutex with spinlockWilliam Breathitt Gray1-37/+52
This patch replaces the mutex I/O lock with a spinlock. This is in preparation for a subsequent patch adding IRQ support for 104-QUAD-8 devices; we can't sleep in an interrupt context, so we'll need to use a spinlock instead. Acked-by: Syed Nayyar Waris <syednwaris@gmail.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/3f74491dec66de10d062978bcb7b9c2b3bdea86c.1632884256.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-10-17counter: Implement events_queue_size sysfs attributeWilliam Breathitt Gray1-0/+45
The events_queue_size sysfs attribute provides a way for users to dynamically configure the Counter events queue size for the Counter character device interface. The size is in number of struct counter_event data structures. The number of elements will be rounded-up to a power of 2 due to a requirement of the kfifo_alloc function called during reallocation of the queue. Cc: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/c914b2db2ea0a2637633bcc3e86ded3c94783f2e.1632884256.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-10-17counter: Implement *_component_id sysfs attributesWilliam Breathitt Gray1-6/+27
The Generic Counter chrdev interface expects users to supply component IDs in order to select extensions for requests. In order for users to know what component ID belongs to which extension this information must be exposed. The *_component_id attribute provides a way for users to discover what component ID belongs to which respective extension. Cc: David Lechner <david@lechnology.com> Cc: Gwendal Grignou <gwendal@chromium.org> Cc: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/8961a11edbb882fc689e468194f5be75f572443e.1632884256.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-10-17counter: Implement signalZ_action_component_id sysfs attributeWilliam Breathitt Gray1-0/+45
The Generic Counter chrdev interface expects users to supply component IDs in order to select Synapses for requests. In order for users to know what component ID belongs to which Synapse this information must be exposed. The signalZ_action_component_id attribute provides a way for users to discover what component ID belongs to the respective Synapse. Cc: Gwendal Grignou <gwendal@chromium.org> Cc: Dan Carpenter <dan.carpenter@oracle.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/a6c81b2f1f5d0b8d59b1ebe4f0fed04914b07547.1632884256.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-10-17counter: Add character device interfaceWilliam Breathitt Gray4-6/+644
This patch introduces a character device interface for the Counter subsystem. Device data is exposed through standard character device read operations. Device data is gathered when a Counter event is pushed by the respective Counter device driver. Configuration is handled via ioctl operations on the respective Counter character device node. Cc: David Lechner <david@lechnology.com> Cc: Gwendal Grignou <gwendal@chromium.org> Cc: Dan Carpenter <dan.carpenter@oracle.com> Cc: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/b8b8c64b4065aedff43699ad1f0e2f8d1419c15b.1632884256.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-10-17counter: Update counter.h comments to reflect sysfs internalizationWilliam Breathitt Gray1-0/+3
The Counter subsystem architecture and driver implementations have changed in order to handle Counter sysfs interactions in a more consistent way. This patch updates the Generic Counter interface header file comments to reflect the changes. Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/19da8ae0c05381b0967c8a334b67f86b814eb880.1630031207.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-10-17counter: Internalize sysfs interface codeWilliam Breathitt Gray13-2268/+1612
This is a reimplementation of the Generic Counter driver interface. There are no modifications to the Counter subsystem userspace interface, so existing userspace applications should continue to run seamlessly. The purpose of this patch is to internalize the sysfs interface code among the various counter drivers into a shared module. Counter drivers pass and take data natively (i.e. u8, u64, etc.) and the shared counter module handles the translation between the sysfs interface and the device drivers. This guarantees a standard userspace interface for all counter drivers, and helps generalize the Generic Counter driver ABI in order to support the Generic Counter chrdev interface (introduced in a subsequent patch) without significant changes to the existing counter drivers. Note, Counter device registration is the same as before: drivers populate a struct counter_device with components and callbacks, then pass the structure to the devm_counter_register function. However, what's different now is how the Counter subsystem code handles this registration internally. Whereas before callbacks would interact directly with sysfs data, this interaction is now abstracted and instead callbacks interact with native C data types. The counter_comp structure forms the basis for Counter extensions. The counter-sysfs.c file contains the code to parse through the counter_device structure and register the requested components and extensions. Attributes are created and populated based on type, with respective translation functions to handle the mapping between sysfs and the counter driver callbacks. The translation performed for each attribute is straightforward: the attribute type and data is parsed from the counter_attribute structure, the respective counter driver read/write callback is called, and sysfs I/O is handled before or after the driver read/write function is called. Cc: Jarkko Nikula <jarkko.nikula@linux.intel.com> Cc: Patrick Havelange <patrick.havelange@essensium.com> Cc: Kamel Bouhara <kamel.bouhara@bootlin.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Syed Nayyar Waris <syednwaris@gmail.com> Reviewed-by: David Lechner <david@lechnology.com> Tested-by: David Lechner <david@lechnology.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> # for stm32 Link: https://lore.kernel.org/r/c68b4a1ffb195c1a2f65e8dd5ad7b7c14e79c6ef.1630031207.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-10-17counter: stm32-timer-cnt: Provide defines for slave mode selectionWilliam Breathitt Gray1-8/+8
The STM32 timer permits configuration of the counter encoder mode via the slave mode control register (SMCR) slave mode selection (SMS) bits. This patch provides preprocessor defines for the supported encoder modes. Cc: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Link: https://lore.kernel.org/r/ad3d9cd7af580d586316d368f74964cbc394f981.1630031207.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-10-17counter: stm32-lptimer-cnt: Provide defines for clock polaritiesWilliam Breathitt Gray1-3/+3
The STM32 low-power timer permits configuration of the clock polarity via the LPTIMX_CFGR register CKPOL bits. This patch provides preprocessor defines for the supported clock polarities. Cc: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Link: https://lore.kernel.org/r/a111c8905c467805ca530728f88189b59430f27e.1630031207.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-08-09counter: 104-quad-8: Describe member 'lock' in 'quad8'William Breathitt Gray1-0/+1
This adds a kernel-doc comment line describing the 'lock' member of the 'quad8' structure. Acked-by: Syed Nayyar Waris <syednwaris@gmail.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/43b4acab9e238638c7067dd4a363a42f94c94ccb.1628511445.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-08-09counter: Rename counter_count_function to counter_functionWilliam Breathitt Gray9-47/+46
The phrase "Counter Count function" is verbose and unintentionally implies that function is a Count extension. This patch adjusts the Counter subsystem code to use the more direct "Counter function" phrase to make the intent of this code clearer. Cc: Jarkko Nikula <jarkko.nikula@linux.intel.com> Cc: Patrick Havelange <patrick.havelange@essensium.com> Cc: Oleksij Rempel <o.rempel@pengutronix.de> Cc: Kamel Bouhara <kamel.bouhara@bootlin.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Cc: David Lechner <david@lechnology.com> Acked-by: Syed Nayyar Waris <syednwaris@gmail.com> Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/8268c54d6f42075a19bb08151a37831e22652499.1627990337.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-08-09counter: Rename counter_signal_value to counter_signal_levelWilliam Breathitt Gray4-12/+13
Signal values will always be levels so let's be explicit it about it to make the intent of the code clear. Cc: Oleksij Rempel <o.rempel@pengutronix.de> Cc: Kamel Bouhara <kamel.bouhara@bootlin.com> Acked-by: Syed Nayyar Waris <syednwaris@gmail.com> Reviewed-by: David Lechner <david@lechnology.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/3f17010abe2415859cea9a5fddabd3c97f635ff5.1627990337.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-08-09counter: Standardize to ERANGE for limit exceeded errorsWilliam Breathitt Gray4-5/+8
ERANGE is a semantically better error code to return when an argument value falls outside the supported limit range of a device. Cc: Jarkko Nikula <jarkko.nikula@linux.intel.com> Cc: Oleksij Rempel <o.rempel@pengutronix.de> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Acked-by: Syed Nayyar Waris <syednwaris@gmail.com> Reviewed-by: David Lechner <david@lechnology.com> Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/ae8d3b20b8b02c96b1c9898ffa2f9fa5d99edc81.1627990337.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-08-09counter: Return error code on invalid modesWilliam Breathitt Gray4-21/+42
Only a select set of modes (function, action, etc.) are valid for a given device configuration. This patch ensures that invalid modes result in a return -EINVAL. Such a situation should never occur in reality, but it's good to define a default switch case for the sake of making the intent of the code clear. Cc: Kamel Bouhara <kamel.bouhara@bootlin.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Acked-by: David Lechner <david@lechnology.com> Acked-by: Syed Nayyar Waris <syednwaris@gmail.com> Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/7af82d4e39610da11edce0ee370285fe1cb1eac8.1627990337.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-08-09counter: 104-quad-8: Return error when invalid mode during ceiling_writeWilliam Breathitt Gray1-2/+3
The 104-QUAD-8 only has two count modes where a ceiling value makes sense: Range Limit and Modulo-N. Outside of these two modes, setting a ceiling value is an invalid operation -- so let's report it as such by returning -EINVAL. Fixes: fc069262261c ("counter: 104-quad-8: Add lock guards - generic interface") Acked-by: Syed Nayyar Waris <syednwaris@gmail.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/a2147f022829b66839a1db5530a7fada47856847.1627990337.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-07-13counter: intel-qep: Remove linux/bitops.h includeJarkko Nikula1-1/+0
0-DAY CI Kernel Test Service reported following iwyu warning: drivers/counter/intel-qep.c:11:1: iwyu: warning: superfluous #include <linux/bitops.h> Remove that include since we don't seem to use anything from it. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/20210629111657.2655688-1-jarkko.nikula@linux.intel.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-06-13counter: interrupt-cnt: Add const qualifier for actions_list arrayWilliam Breathitt Gray1-3/+3
The struct counter_synapse actions_list member expects a const enum counter_synapse_action array. This patch renames interrupt_cnt_synapse_actionss to interrupt_cnt_synapse_actions and adds a const qualifier to match actions_list. Cc: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Reviewed-by: <o.rempel@pengutronix.de> Link: https://lore.kernel.org/r/20210610013642.149961-1-vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-06-13counter: intel-qep: Use to_pci_dev() helperJarkko Nikula1-2/+2
Use to_pci_dev() helper instead of container_of(d, struct pci_dev, dev); Suggested-by: Jonathan Cameron <jic23@kernel.org> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/20210611115558.796338-2-jarkko.nikula@linux.intel.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-06-13counter: intel-qep: Mark PM callbacks with __maybe_unusedJarkko Nikula1-4/+2
Remove CONFIG_PM ifdef and mark PM callbacks with __maybe_unused. Suggested-by: Jonathan Cameron <jic23@kernel.org> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/20210611115558.796338-1-jarkko.nikula@linux.intel.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-06-09counter: stm32-timer-cnt: Add const qualifier for actions_list arrayWilliam Breathitt Gray1-1/+1
The struct counter_synapse actions_list member expects a const enum counter_synapse_action array. This patch adds the const qualifier to the stm32_synapse_actions to match actions_list. Cc: Benjamin Gaignard <benjamin.gaignard@st.com> Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/9675edda958ee2ca371d271f46445d3e1934ba82.1623201081.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-06-09counter: stm32-lptimer-cnt: Add const qualifier for actions_list arrayWilliam Breathitt Gray1-1/+1
The struct counter_synapse actions_list member expects a const enum counter_synapse_action array. This patch adds the const qualifier to the stm32_lptim_cnt_synapse_actions to match actions_list. Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/785e0daa3633923ede42394f423fcf94c4469154.1623201081.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-06-09counter: microchip-tcb-capture: Add const qualifier for actions_list arrayWilliam Breathitt Gray1-1/+1
The struct counter_synapse actions_list member expects a const enum counter_synapse_action array. This patch adds the const qualifier to the mchp_tc_synapse_actions to match actions_list. Cc: Kamel Bouhara <kamel.bouhara@bootlin.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/165f9682ce308a60a477aaa56fdae7bc949dc218.1623201081.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-06-09counter: ftm-quaddec: Add const qualifier for actions_list arrayWilliam Breathitt Gray1-1/+1
The struct counter_synapse actions_list member expects a const enum counter_synapse_action array. This patch adds the const qualifier to the ftm_quaddec_synapse_actions to match actions_list. Cc: Patrick Havelange <patrick.havelange@essensium.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/db1df2021efb1b98e6d1a50787be5a52a1896574.1623201081.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-06-09counter: 104-quad-8: Add const qualifier for actions_list arrayWilliam Breathitt Gray1-2/+2
The struct counter_synapse actions_list member expects a const enum counter_synapse_action array. This patch adds the const qualifier to the quad8_index_actions_list and quad8_synapse_actions_list to match actions_list. Acked-by: Syed Nayyar Waris <syednwaris@gmail.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/776ba3ad0a3c609d3600cffe0ed6446baf29fee9.1623201081.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-06-09counter: stm32-timer-cnt: Add const qualifier for functions_list arrayWilliam Breathitt Gray1-1/+1
The struct counter_count functions_list member expects a const enum counter_count_function array. This patch adds the const qualifier to the stm32_count_functions to match functions_list. Cc: Benjamin Gaignard <benjamin.gaignard@st.com> Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/46a1e7096dd9280d8f241894186b3c903956a55f.1623201081.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-06-09counter: stm32-lptimer-cnt: Add const qualifier for functions_list arrayWilliam Breathitt Gray1-1/+1
The struct counter_count functions_list member expects a const enum counter_count_function array. This patch adds the const qualifier to the stm32_lptim_cnt_functions to match functions_list. Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/08830119594acdb3bc9d36ae2e65b2eb26589ade.1623201081.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-06-09counter: microchip-tcb-capture: Add const qualifier for functions_list arrayWilliam Breathitt Gray1-1/+1
The struct counter_count functions_list member expects a const enum counter_count_function array. This patch adds the const qualifier to the mchp_tc_count_functions to match functions_list. Cc: Kamel Bouhara <kamel.bouhara@bootlin.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/74cb91ab7b459563762ec28633cd8808093aa2ad.1623201081.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-06-09counter: interrupt-cnt: Add const qualifier for functions_list arrayWilliam Breathitt Gray1-1/+1
The struct counter_count functions_list member expects a const enum counter_count_function array. This patch adds the const qualifier to the interrupt__cnt_functions to match functions_list. Cc: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/86f7fb77f703cf2508a6b4ee9cf80aa523392976.1623201081.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-06-09counter: 104-quad-8: Add const qualifier for functions_list arrayWilliam Breathitt Gray1-1/+1
The struct counter_count functions_list member expects a const enum counter_count_function array. This patch adds the const qualifier to the quad8_count_functions_list to match functions_list. Acked-by: Syed Nayyar Waris <syednwaris@gmail.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/6847da7553208e7f2554e6c7688e2021f7e19716.1623201081.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-06-09counter: 104-quad-8: Add const qualifiers for quad8_preset_register_setWilliam Breathitt Gray1-2/+2
Add some safety by qualifying the quad8_preset_register_set() function parameters as const. Acked-by: Syed Nayyar Waris <syednwaris@gmail.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/050f1b518eeae8e3683f7d6d11f3219a137adf48.1623201081.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-06-09counter: 104-quad-8: Annotate hardware config module parameterWilliam Breathitt Gray1-1/+1
When the kernel is running in secure boot mode, we lock down the kernel to prevent userspace from modifying the running kernel image. Whilst this includes prohibiting access to things like /dev/mem, it must also prevent access by means of configuring driver modules in such a way as to cause a device to access or modify the kernel image. To this end, annotate module_param* statements that refer to hardware configuration and indicate for future reference what type of parameter they specify. The parameter parser in the core sees this information and can skip such parameters with an error message if the kernel is locked down. The module initialisation then runs as normal, but just sees whatever the default values for those parameters is. Note that we do still need to do the module initialisation because some drivers have viable defaults set in case parameters aren't specified and some drivers support automatic configuration (e.g. PNP or PCI) in addition to manually coded parameters. This patch annotates the 104-QUAD-8 driver. Acked-by: Syed Nayyar Waris <syednwaris@gmail.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/97ce79878a26809f0b15b2eac9a86ca39e0ecd74.1623201081.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-06-09counter: 104-quad-8: Remove pointless commentWilliam Breathitt Gray1-1/+0
It is obvious that devm_counter_register() is used to register a Counter device, so a comment stating such is pointless here. Acked-by: Syed Nayyar Waris <syednwaris@gmail.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/77e9f3daa091d0ad0ee56b8973705dd03db85dd4.1623201081.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-06-03counter: Add support for Intel Quadrature Encoder PeripheralJarkko Nikula3-0/+557
Add support for Intel Quadrature Encoder Peripheral found on Intel Elkhart Lake platform. Initial implementation was done by Felipe Balbi while he was working at Intel with later changes from Raymond Tan and me. Co-developed-by: Felipe Balbi (Intel) <balbi@kernel.org> Signed-off-by: Felipe Balbi (Intel) <balbi@kernel.org> Co-developed-by: Raymond Tan <raymond.tan@intel.com> Signed-off-by: Raymond Tan <raymond.tan@intel.com> Signed-off-by: Jarkko Nikula <jarkko.nikula@linux.intel.com> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/20210602113259.158674-1-jarkko.nikula@linux.intel.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-03-26Merge tag 'iio-for-5.13a' of ↵Greg Kroah-Hartman5-852/+357
https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next Jonathan writes: 1st set of IIO/counter device support, features and cleanup in the 5.13 cycle Big set in here from Alexandru Ardelean enabling multiple buffer support. This includes providing a new directory per buffer that combines what was previously in buffer/ and scan_elements/. Old interfaces still in place for compatiblity. Note immuatable branch for scmi patches to allow for some significant rework going on in that subsystem. Merge required updating to reflect some changes in IIO. Late rebase to fix some wrong fixes tags due to some earlier rebases made necessary by messing up the immutable branch. IIO New Device Support * adi,ad5686 - Add info to support AD5673R and AD5677R * bosch,bmi088 - New driver supporting this accelerometer + gyroscope * cros_ec_mkbp - New driver for this proximity sensor that exposes a 'front' sensor. Very simple switch like device, but driver allows it to share interface with more sophisticated proximity sensors. * iio_scmi - New driver to support ARM SCMI protocol to expose underlying accelerometers and gyroscopes via this firmware interface. * st,st_magn - Add ID for IISMDC magnetometer. * ti,ads131e0 - New driver supporting ads131e04, ads131e06 and ads131e08 24 bit ADCs Counter New Device Support * IRQ or GPIO based counter - New driver for a conceptually simple counter that uses interrupts to perform the count. Features * core - Dual buffer supprt including: Various helpers to centralize handling of bufferer related elements. Document existing and new IOCTLs Register the IIO chrdev only if it can actually be used for anything. Rework attribute group creation in the core (lots of patches) Merge buffer/ and scan_elements/ entries into one list + maintain backwards compatible set. Introduce the internal logic and IOCTL to allow multiple buffers + access to an anon FD per buffer to actually read from it. Tidy up tools/iio/iio_generic_buffer and switch to new interfaces. Update ABI docs. A few follow up fixes, unsuprising as this was a huge bit of rework. - Move common case setting of trig->parent to the core. - Provide an iio_read_channel_processed_scale() to avoid loss of precision from iio_read_channel_processed() then applying integer scale. Use it in ntc_thermistor driver in hwmon. - Allow drivers to specify labels from elsewhere than DT. Use it for bmc150 and kxcjk-1013 labels related to position on 2 in one tablets. - Document label usage for proximity and accelerometer sensors. - Some local variable renames for consistency tools - Add -a parameter to iio_event_monitor to allow autoenabling of events. * acpi_als - Add trigger support for devices that don't support notification method. * adi,ad7124 - Allow more than 8 channels. This is a complex little device, but is capable of supporting up to 16 channels if the share certain configuration settings. * hrtimer-trigger - Support sampling frequency below 1Hz. * mediatek,mt8195-auxadc - Add compatible to binding docs (always also includes mt8173) * st,stm32-adc - Enable timetamps when not using DMA. * vishay,vcnl3020 - Sampling frequency control. Cleanup and minor fixes: * treewide - Use some getter and setter functions instead of opencoding. - Set of fixes for pointless casts in various drivers. - Avoid wrong kernel-doc marking on comment blocks. - Fix various other minor kernel-doc issues shown by W=1 * core - Use a signed temporary for IIO_VAL_FRACTIONAL_LOG2 to avoid odd casts. - Fix IIO_VAL_FRACTIONAL_LOG2 for values between -1.0 and 0.0 - Add unit tests for iio_format_value() * docs - Fix formatting/typos in iio_configfs.rst and buffers.rst - Add documentation of index in buffers.rst - Fix scan element description - Avoid some issues with HTML generation from ABI docs by moving duplicated defintions to more generic files. - Drop reference to long dead mailing list. * 104-quad - Remove left over deprecated IIO counter ABI. * adi,adi-axi-adc - Fix wrong bit of docs. * adi,ad5791 - Typos * adi,ad9834 - Switch to device managed functions in probe. * adi,adis* - Add and use helpers for locking to reduced duplication. * adi,adis16480 - Fix calculation of sampling frequency when using pulse per second input. * adi,adis16475 - Calculate the IMU scaled internal sampling rate and runtime depending on sysfs based configuration rather than getting from DT. Drop now unnecessary property from DT bindings doc. * cros_ec - Fix result of a series of recent changes that means extended buffer attributes turn up in the wrong place. Too complex to revert the various patches unfortunately so this is a bit messy. * fsl,mma3452 - Indentation cleanup. * hid-sensors - Size of storage needs to increase for some parts when using quaternions. - Move the get sensistivity attribute to hid-sensors-common to reduce duplication. Enable it for more device types. - Correctly handle relative sensitivity if reported that way including documenting the new ABI. * maxim,max517 - Use device managed functions in probe. * mediatek,mt6360-adc - Use asm/unaligned.h instead of directly including unaligned/be_byteshift.h * novuton,npcm-adc - Local lock instead of missusing mlock. * semtech,sx9500 - Typos * st,sensor - typo fix * st,spear-adc - Local lock instead of missusing mlock. * st,stm32-adc - Long standing HAS_IOMEM dependency fix. * st,stm32-counter - Remove left over deprecated IIO counter ABI. * ti,palmas-adc - Local lock instead of missusing mlock. * ti,tmp007 - Switch to device managed functions in probe. Other * MAINTAINERS - Move Peter Meerwald-Stadler to Credits at his request * tag 'iio-for-5.13a' of https://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio: (119 commits) iio: acpi_als: Add trigger support iio: acpi_als: Add local variable dev in probe iio: acpi_als: Add timestamp channel iio: adc: ad7292: Modify the bool initialization assignment iio: cros: unify hw fifo attributes without API changes iio: kfifo: add devm_iio_triggered_buffer_setup_ext variant iio: event_monitor: Enable events before monitoring dt-bindings: iio: adc: Add compatible for Mediatek MT8195 iio:magnetometer: Add Support for ST IIS2MDC dt-bindings: iio: st,st-sensors add IIS2MDC. staging: iio: ad9832: kernel-doc fixes iio:dac:max517.c: Use devm_iio_device_register() iio:cros_ec_sensors: Fix a wrong function name in kernel doc. iio: buffer: kfifo_buf: kernel-doc, typo in function name. iio: accel: sca3000: kernel-doc fixes. Missing - and wrong function names. iio: adc: adi-axi-adc: Drop false marking for kernel-doc iio: adc: cpcap-adc: kernel-doc fix - that should be _ in structure name iio: dac: ad5504: fix wrong part number in kernel-doc structure name. iio: dac: ad5770r: kernel-doc fix case of letter R wrong in structure name iio: adc: ti-adc084s021: kernel-doc fixes, missing function names ...
2021-03-25counter: add IRQ or GPIO based counterOleksij Rempel3-0/+255
Add simple IRQ or GPIO base counter. This device is used to measure rotation speed of some agricultural devices, so no high frequency on the counter pin is expected. The maximal measurement frequency depends on the CPU and system load. On the idle iMX6S I was able to measure up to 20kHz without count drops. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de> Reviewed-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/20210301080401.22190-3-o.rempel@pengutronix.de Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-03-11counter: 104-quad-8: Remove IIO counter ABIWilliam Breathitt Gray2-590/+65
The IIO counter driver has been superseded by the Counter subsystem as discussed in [1]. This patch removes the IIO counter ABI from the 104-QUAD-8 driver. [1] https://lore.kernel.org/lkml/20210119104105.000010df@Huawei.com/ Cc: Syed Nayyar Waris <syednwaris@gmail.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/98a39983d5df761c058a469d1346fd8ffdef8516.1611973018.git.vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-03-11counter: stm32-lptimer-cnt: remove iio counter abiFabrice Gasnier2-262/+37
Currently, the STM32 LP Timer counter driver registers into both IIO and counter subsystems, which is redundant. Remove the IIO counter ABI and IIO registration from the STM32 LP Timer counter driver since it's been superseded by the Counter subsystem as discussed in [1]. Keep only the counter subsystem related part. Move a part of the ABI documentation into a driver comment. This also removes a duplicate ABI warning $ scripts/get_abi.pl validate ... /sys/bus/iio/devices/iio:deviceX/in_count0_preset is defined 2 times: ./Documentation/ABI/testing/sysfs-bus-iio-timer-stm32:100 ./Documentation/ABI/testing/sysfs-bus-iio-lptimer-stm32:0 [1] https://lkml.org/lkml/2021/1/19/347 Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Link: https://lore.kernel.org/r/1611926542-2490-1-git-send-email-fabrice.gasnier@foss.st.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-03-06counter: stm32-timer-cnt: fix ceiling miss-alignment with reload registerFabrice Gasnier1-8/+3
Ceiling value may be miss-aligned with what's actually configured into the ARR register. This is seen after probe as currently the ARR value is zero, whereas ceiling value is set to the maximum. So: - reading ceiling reports zero - in case the counter gets enabled without any prior configuration, it won't count. - in case the function gets set by the user 1st, (priv->ceiling) is used. Fix it by getting rid of the cached "priv->ceiling" variable. Rather use the ARR register value directly by using regmap read or write when needed. There should be no drawback on performance as priv->ceiling isn't used in performance critical path. There's also no point in writing ARR while setting function (sms), so it can be safely removed. Fixes: ad29937e206f ("counter: Add STM32 Timer quadrature encoder") Suggested-by: William Breathitt Gray <vilhelm.gray@gmail.com> Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Cc: <Stable@vger.kernel.org> Link: https://lore.kernel.org/r/1614793789-10346-1-git-send-email-fabrice.gasnier@foss.st.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-03-06counter: stm32-timer-cnt: fix ceiling write max valueFabrice Gasnier1-0/+5
The ceiling value isn't checked before writing it into registers. The user could write a value higher than the counter resolution (e.g. 16 or 32 bits indicated by max_arr). This makes most significant bits to be truncated. Fix it by checking the max_arr to report a range error [1] to the user. [1] https://lkml.org/lkml/2021/2/12/358 Fixes: ad29937e206f ("counter: Add STM32 Timer quadrature encoder") Signed-off-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Cc: <Stable@vger.kernel.org> Link: https://lore.kernel.org/r/1614696235-24088-1-git-send-email-fabrice.gasnier@foss.st.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-02-27counter: stm32-timer-cnt: Report count function when SLAVE_MODE_DISABLEDWilliam Breathitt Gray1-14/+25
When in SLAVE_MODE_DISABLED mode, the count still increases if the counter is enabled because an internal clock is used. This patch fixes the stm32_count_function_get() and stm32_count_function_set() functions to properly handle this behavior. Fixes: ad29937e206f ("counter: Add STM32 Timer quadrature encoder") Cc: Fabrice Gasnier <fabrice.gasnier@st.com> Cc: Maxime Coquelin <mcoquelin.stm32@gmail.com> Cc: Alexandre Torgue <alexandre.torgue@st.com> Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Reviewed-by: Fabrice Gasnier <fabrice.gasnier@foss.st.com> Link: https://lore.kernel.org/r/20210226012931.161429-1-vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2021-01-14counter:ti-eqep: remove floorDavid Lechner1-35/+0
The hardware doesn't support this. QPOSINIT is an initialization value that is triggered by other things. When the counter overflows, it always wraps around to zero. Fixes: f213729f6796 "counter: new TI eQEP driver" Signed-off-by: David Lechner <david@lechnology.com> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/20201214000927.1793062-1-david@lechnology.com Cc: <Stable@vger.kernel.org> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2020-12-03counter: microchip-tcb-capture: Fix CMR value checkWilliam Breathitt Gray1-6/+10
The ATMEL_TC_ETRGEDG_* defines are not masks but rather possible values for CMR. This patch fixes the action_get() callback to properly check for these values rather than mask them. Fixes: 106b104137fd ("counter: Add microchip TCB capture counter") Signed-off-by: William Breathitt Gray <vilhelm.gray@gmail.com> Acked-by: Alexandre Belloni <alexandre.belloni@bootlin.com> Acked-by: Kamel Bouhara <kamel.bouhara@bootlin.com> Cc: <Stable@vger.kernel.org> Link: https://lore.kernel.org/r/20201114232805.253108-1-vilhelm.gray@gmail.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2020-11-01counter/ti-eqep: Fix regmap max_registerDavid Lechner1-2/+2
The values given were the offset of the register after the last register instead of the actual last register in each range. Fix by using the correct last register of each range. Fixes: f213729f6796 ("counter: new TI eQEP driver") Signed-off-by: David Lechner <david@lechnology.com> Acked-by: William Breathitt Gray <vilhelm.gray@gmail.com> Link: https://lore.kernel.org/r/20201025165122.607866-1-david@lechnology.com Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
2020-09-29counter: use semicolons rather than commas to separate statementsJulia Lawall1-1/+1
Replace commas with semicolons. What is done is essentially described by the following Coccinelle semantic patch (http://coccinelle.lip6.fr/): // <smpl> @@ expression e1,e2; @@ e1 -, +; e2 ... when any // </smpl> Signed-off-by: Julia Lawall <Julia.Lawall@inria.fr> Reviewed-by: David Lechner <david@lechnology.com> Link: https://lore.kernel.org/r/1601233948-11629-16-git-send-email-Julia.Lawall@inria.fr Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>