kernel/linux.git - Linux kernel stable tree (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2023-09-23	cxl/acpi: Annotate struct cxl_cxims_data with __counted_by	Kees Cook	1	-2/+2
2023-07-18	cxl/acpi: Return 'rc' instead of '0' in cxl_parse_cfmws()	Breno Leitao	1	-1/+1
2023-07-18	cxl/acpi: Fix a use-after-free in cxl_parse_cfmws()	Breno Leitao	1	-2/+1
2023-06-26	Merge branch 'for-6.5/cxl-rch-eh' into for-6.5/cxl	Dan Williams	1	-90/+116
2023-06-26	cxl/port: Rename CXL_DECODER_{EXPANDER, ACCELERATOR} => {HOSTONLYMEM, DEVMEM}	Dan Williams	1	-1/+1
2023-06-25	cxl/acpi: Directly bind the CEDT detected CHBCR to the Host Bridge's port	Robert Richter	1	-28/+63
2023-06-25	cxl/acpi: Move add_host_bridge_uport() after cxl_get_chbs()	Robert Richter	1	-45/+45
2023-06-25	cxl/acpi: Probe RCRB later during RCH downstream port creation	Robert Richter	1	-30/+21
2023-02-11	Merge branch 'for-6.3/cxl-ram-region' into cxl/next	Dan Williams	1	-1/+2
2023-02-11	cxl/dax: Create dax devices for CXL RAM regions	Dan Williams	1	-1/+2
2023-02-07	Merge branch 'for-6.3/cxl' into cxl/next	Dan Williams	1	-1/+1
2023-01-27	cxl: fix spelling mistakes	Randy Dunlap	1	-1/+1
2023-01-26	cxl/pmem: Fix nvdimm unregistration when cxl_pmem driver is absent	Dan Williams	1	-1/+0
2022-12-06	cxl: update names for interleave ways conversion macros	Dave Jiang	1	-3/+3
2022-12-06	cxl: update names for interleave granularity conversion macros	Dave Jiang	1	-2/+2
2022-12-06	cxl/acpi: Warn about an invalid CHBCR in an existing CHBS entry	Robert Richter	1	-1/+2
2022-12-05	cxl/acpi: Fail decoder add if CXIMS for HBIG is missing	Alison Schofield	1	-0/+5
2022-12-05	Merge branch 'for-6.2/cxl-xor' into for-6.2/cxl	Dan Williams	1	-3/+134
2022-12-04	cxl/acpi: Support CXL XOR Interleave Math (CXIMS)	Alison Schofield	1	-3/+134
2022-12-03	cxl/acpi: Extract component registers of restricted hosts from RCRB	Robert Richter	1	-5/+46
2022-12-03	cxl/ACPI: Register CXL host ports by bridge device	Robert Richter	1	-18/+20
2022-12-03	tools/testing/cxl: Make mock CEDT parsing more robust	Dan Williams	1	-0/+4
2022-12-03	cxl/acpi: Move rescan to the workqueue	Dan Williams	1	-2/+15
2022-12-02	cxl/acpi: Simplify cxl_nvdimm_bridge probing	Dan Williams	1	-0/+1
2022-11-14	cxl/acpi: Improve debug messages in cxl_acpi_probe()	Robert Richter	1	-4/+8
2022-11-14	cxl: Unify debug messages when calling devm_cxl_add_dport()	Robert Richter	1	-5/+2
2022-11-14	cxl: Unify debug messages when calling devm_cxl_add_port()	Robert Richter	1	-2/+0
2022-08-02	cxl/acpi: Minimize granularity for x1 interleaves	Dan Williams	1	-0/+6
2022-08-02	cxl/acpi: Autoload driver for 'cxl_acpi' test devices	Dan Williams	1	-0/+7
2022-07-22	cxl/port: Record parent dport when adding ports	Dan Williams	1	-2/+1
2022-07-21	cxl/core: Define a 'struct cxl_root_decoder'	Dan Williams	1	-4/+36
2022-07-21	cxl/acpi: Track CXL resources in iomem_resource	Dan Williams	1	-3/+141
2022-07-21	cxl/core: Define a 'struct cxl_switch_decoder'	Dan Williams	1	-1/+3
2022-07-10	cxl: Introduce cxl_to_{ways,granularity}	Dan Williams	1	-15/+19
2022-07-10	cxl/core: Drop ->platform_res attribute for root decoders	Dan Williams	1	-7/+10
2022-04-29	cxl/acpi: Add root device lockdep validation	Dan Williams	1	-0/+13
2022-02-09	cxl/core/port: Fix / relax decoder target enumeration	Dan Williams	1	-1/+1
2022-02-09	cxl/mem: Add the cxl_mem driver	Ben Widawsky	1	-1/+2
2022-02-09	cxl/core/port: Add switch port enumeration	Dan Williams	1	-16/+1
2022-02-09	cxl/core/port: Remove @host argument for dport + decoder enumeration	Dan Williams	1	-1/+1
2022-02-09	cxl/port: Add a driver for 'struct cxl_port' objects	Ben Widawsky	1	-25/+1
2022-02-09	cxl/core/hdm: Add CXL standard decoder enumeration to the core	Dan Williams	1	-28/+15
2022-02-09	cxl/core: Generalize dport enumeration in the core	Dan Williams	1	-59/+8
2022-02-09	cxl/pci: Rename pci.h to cxlpci.h	Dan Williams	1	-1/+1
2022-02-09	cxl/port: Up-level cxl_add_dport() locking requirements to the caller	Dan Williams	1	-0/+2
2022-02-09	cxl/port: Introduce cxl_port_to_pci_bus()	Dan Williams	1	-5/+9
2022-02-09	cxl: Prove CXL locking	Dan Williams	1	-5/+5
2022-02-09	cxl/core/port: Make passthrough decoder init implicit	Ben Widawsky	1	-5/+0
2022-02-09	cxl/core/port: Clarify decoder creation	Ben Widawsky	1	-2/+2
2022-02-09	cxl/core: Convert decoder range to resource	Ben Widawsky	1	-14/+8