summaryrefslogtreecommitdiff
path: root/drivers/cxl/cxl.h
AgeCommit message (Expand)AuthorFilesLines
2022-12-04cxl/pci: Find and map the RAS Capability StructureDan Williams1-0/+19
2022-12-04cxl/pci: Prepare for mapping RAS Capability StructureDan Williams1-1/+3
2022-12-04cxl/core/regs: Make cxl_map_{component, device}_regs() device genericDan Williams1-8/+6
2022-12-03cxl/acpi: Extract component registers of restricted hosts from RCRBRobert Richter1-0/+16
2022-12-03cxl/region: Manage CPU caches relative to DPA invalidation eventsDan Williams1-0/+8
2022-12-03cxl: add dimm_id support for __nvdimm_create()Dave Jiang1-0/+3
2022-12-03cxl/acpi: Move rescan to the workqueueDan Williams1-1/+2
2022-12-03cxl/pmem: Remove the cxl_pmem_wq and related infrastructureDan Williams1-17/+0
2022-12-03cxl/pmem: Refactor nvdimm device registration, delete the workqueueDan Williams1-2/+5
2022-12-03cxl/region: Drop redundant pmem region release handlingDan Williams1-1/+0
2022-11-14cxl: Replace HDM decoder granularity magic numbersAdam Manzanares1-4/+7
2022-11-14cxl/core: Remove duplicate declaration of devm_cxl_iomap_block()Robert Richter1-2/+0
2022-11-05cxl/region: Fix 'distance' calculation with passthrough portsDan Williams1-0/+2
2022-11-05cxl/pmem: Fix cxl_pmem_region and cxl_memdev leakDan Williams1-1/+1
2022-08-05cxl/region: describe targets and nr_targets members of cxl_region_paramsBagas Sanjaya1-0/+2
2022-08-02cxl/acpi: Minimize granularity for x1 interleavesDan Williams1-0/+2
2022-08-01cxl/region: prevent underflow in ways_to_cxl()Dan Carpenter1-1/+1
2022-07-26cxl/region: Introduce cxl_pmem_region objectsDan Williams1-1/+35
2022-07-26cxl/pmem: Fix offline_nvdimm_bus() to offline by bridgeDan Williams1-0/+1
2022-07-26cxl/region: Add region driver boiler plateDan Williams1-0/+1
2022-07-25cxl/hdm: Commit decoder state to hardwareDan Williams1-1/+12
2022-07-25cxl/region: Program target listsDan Williams1-0/+2
2022-07-25cxl/region: Attach endpoint decodersDan Williams1-0/+20
2022-07-25cxl/acpi: Add a host-bridge index lookup mechanismDan Williams1-0/+2
2022-07-25cxl/region: Enable the assignment of endpoint decoders to regionsDan Williams1-0/+11
2022-07-25cxl/region: Allocate HPA capacity to regionsDan Williams1-0/+2
2022-07-25cxl/region: Add interleave geometry attributesBen Widawsky1-0/+33
2022-07-25cxl/region: Add a 'uuid' attributeBen Widawsky1-0/+25
2022-07-22cxl/region: Add region creation supportBen Widawsky1-0/+18
2022-07-22cxl/mem: Enumerate port targets before adding endpointsDan Williams1-0/+5
2022-07-22cxl/port: Move dport tracking to an xarrayDan Williams1-5/+7
2022-07-22cxl/port: Move 'cxl_ep' references to an xarray per portDan Williams1-3/+1
2022-07-22cxl/port: Record parent dport when adding portsDan Williams1-2/+5
2022-07-22cxl/port: Record dport in endpoint referencesDan Williams1-0/+2
2022-07-22cxl/hdm: Track next decoder to allocateDan Williams1-0/+2
2022-07-22cxl/hdm: Add 'mode' attribute to decoder objectsDan Williams1-0/+9
2022-07-22cxl/hdm: Enumerate allocated DPADan Williams1-0/+2
2022-07-21cxl/core: Define a 'struct cxl_endpoint_decoder'Dan Williams1-1/+14
2022-07-21cxl/core: Define a 'struct cxl_root_decoder'Dan Williams1-2/+13
2022-07-21cxl/core: Define a 'struct cxl_switch_decoder'Dan Williams1-8/+22
2022-07-20cxl/port: Read CDAT tableIra Weiny1-0/+7
2022-07-11cxl/pmem: Delete unused nvdimm attributeDan Williams1-1/+0
2022-07-10cxl/port: Cache CXL host bridge dataDan Williams1-0/+2
2022-07-10cxl: Introduce cxl_to_{ways,granularity}Dan Williams1-0/+26
2022-07-10cxl/core: Drop is_cxl_decoder()Dan Williams1-1/+0
2022-07-10cxl/core: Drop ->platform_res attribute for root decodersDan Williams1-5/+1
2022-07-10cxl/core: Rename ->decoder_range ->hpa_rangeDan Williams1-2/+2
2022-06-22cxl/core: Use is_endpoint_decoderBen Widawsky1-0/+1
2022-04-29cxl: Drop cxl_device_lock()Dan Williams1-78/+0
2022-02-09cxl/core/port: Add endpoint decodersBen Widawsky1-0/+1
generated by cgit v1.2.3 (git 2.39.0) at 2024-07-26 19:58:03 +0300