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path: root/drivers/fpga
AgeCommit message (Expand)AuthorFilesLines
2017-04-26fpga fr br: update supported version numbersMatthew Gerlach1-11/+19
2017-04-26fpga: region: release FPGA region reference in error pathTobias Klauser1-1/+3
2017-04-26fpga altera-hps2fpga: disable/unprepare clock on error in alt_fpga_bridge_pro...Tobias Klauser1-6/+9
2017-04-08fpga: Add support for Xilinx LogiCORE PR DecouplerMoritz Fischer3-0/+172
2017-04-08fpga pr ip: Platform driver for Altera Partial Reconfiguration IP.Matthew Gerlach3-0/+76
2017-04-08fpga pr ip: Core driver support for Altera Partial Reconfiguration IP.Matthew Gerlach3-0/+226
2017-04-08fpga: add config complete timeoutAlan Tull1-0/+3
2017-04-08fpga manager: Add Xilinx slave serial SPI driverAnatolij Gustschin3-0/+206
2017-04-08fpga: altera_freeze_bridge: Constify opsMoritz Fischer1-1/+1
2017-03-17fpga: bridge: Replace open-coded list_for_each + list_entryMoritz Fischer1-11/+4
2017-03-17fpga: Add support for Lattice iCE40 FPGAsJoel Holdsworth3-0/+214
2017-03-17FPGA: Add TS-7300 FPGA managerFlorian Fainelli3-0/+164
2017-03-17fpga: region: Add fpga-region property 'encrypted-fpga-config'Moritz Fischer1-2/+6
2017-03-17fpga: zynq: Add support for encrypted bitstreamsMoritz Fischer1-3/+25
2017-03-17fpga: fix sparse warnings in fpga-mgr and fpga-bridgeDinh Nguyen2-2/+2
2017-02-10fpga zynq: Use the scatterlist interfaceJason Gunthorpe1-39/+135
2017-02-10fpga: Add scatterlist based programmingJason Gunthorpe1-30/+206
2017-02-10fpga zynq: Check the bitstream for validityJason Gunthorpe1-0/+21
2017-02-10fpga zynq: Check for errors after completing DMAJason Gunthorpe1-22/+32
2016-11-30fpga: Clarify how write_init works streaming modesJason Gunthorpe2-2/+5
2016-11-30fpga zynq: Fix incorrect ISR state on bootupJason Gunthorpe1-7/+10
2016-11-30fpga zynq: Remove priv->devJason Gunthorpe1-11/+8
2016-11-30fpga zynq: Add missing \n to messagesJason Gunthorpe1-11/+11
2016-11-30fpga: Add COMPILE_TEST to all driversJason Gunthorpe1-2/+3
2016-11-17ARM: socfpga: checking the wrong variableDan Carpenter1-1/+1
2016-11-10fpga-manager: Add Socfpga Arria10 supportAlan Tull3-0/+563
2016-11-10fpga: add altera freeze bridge supportAlan Tull3-0/+283
2016-11-10ARM: socfpga: fpga bridge driver supportAlan Tull4-0/+410
2016-11-10fpga: fpga-region: device tree control for FPGAAlan Tull3-0/+613
2016-11-10fpga: add fpga bridge frameworkAlan Tull3-0/+405
2016-11-10fpga-mgr: add fpga image information structAlan Tull3-15/+19
2016-11-10fpga: add method to get fpga manager from deviceAlan Tull1-22/+54
2016-09-08fpga manager: Add hardware dependency to Zynq driverJean Delvare1-0/+1
2016-08-04drivers/fpga/Kconfig: fix build failureSudip Mukherjee1-0/+1
2015-11-25fpga manager: Fix firmware resource leak on errorTobias Klauser1-3/+1
2015-11-25fpga manager: remove labelAlan Tull1-6/+3
2015-10-30fpga: socfpga: Fix check of return value of devm_request_irqMoritz Fischer1-1/+1
2015-10-24fpga: zynq-fpga: Fix issue with drvdata being overwritten.Moritz Fischer1-3/+4
2015-10-24fpga manager: remove unnecessary null pointer checksAlan Tull1-8/+4
2015-10-24fpga manager: ensure lifetime with of_fpga_mgr_getAlan Tull1-15/+17
2015-10-24fpga: zynq-fpga: Change fw format to handle bin instead of bit.Moritz Fischer1-22/+2
2015-10-24fpga: zynq-fpga: Fix unbalanced clock handlingMoritz Fischer1-2/+2
2015-10-18fpga manager: Adding FPGA Manager support for Xilinx Zynq 7000Moritz Fischer3-0/+539
2015-10-07fpga manager: add driver for socfpga fpga managerAlan Tull3-0/+627
2015-10-07add FPGA manager coreAlan Tull3-0/+404