summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c
AgeCommit message (Expand)AuthorFilesLines
2024-07-08drm/amdgpu: Set no_hw_access when VF request full GPU failsYifan Zha1-1/+3
2024-06-28drm/amdgpu: process RAS fatal error MB notificationVignesh Chander1-3/+22
2024-06-14drm/amdgpu: fix sriov host flr handlerYunxiang Li1-0/+14
2024-06-14drm/amdgpu: add skip_hw_access checks for sriovYunxiang Li1-0/+9
2024-06-05drm/amdgpu: fix failure mapping legacy queue when FLRLin.Cao1-0/+2
2024-05-29drm/amdgpu: Add lock around VF RLCG interfaceVictor Skvortsov1-0/+6
2024-05-20drm/amdgpu: Queue KFD reset workitem in VF FEDVictor Skvortsov1-1/+1
2024-05-02drm/amdgpu: Fix two reset triggered in a rowYunxiang Li1-1/+1
2024-05-02drm/amdgpu: avoid reading vf2pf info size from FBZhigang Luo1-1/+1
2024-04-30drm/amdgpu: fix uninitialized scalar variable warningTim Huang1-0/+2
2024-04-10amd/amdgpu: improve VF recover timeZhigang Luo1-0/+1
2024-04-10drm/amd/amdgpu: support MES command SET_HW_RESOURCE1 in sriovchongli21-0/+5
2024-04-10drm/amdgpu: use vm_update_mode=0 as default in sriov for gfx10.3 onwardsDanijel Slivka1-6/+0
2024-03-20drm/amdgpu: trigger flr_work if reading pf2vf data failedZhigang Luo1-5/+24
2024-02-22drm/amdgpu: Improve error checking in amdgpu_virt_rlcg_reg_rw (v2)Victor Lu1-2/+3
2024-01-25amdgpu/drm: Use vram manager for virtualization page retirementVictor Skvortsov1-10/+20
2024-01-16drm/amdgpu: move kiq_reg_write_reg_wait() out of amdgpu_virt.cAlex Deucher1-53/+0
2023-12-13drm/amdgpu: Use the right method to get IP versionLijo Lazar1-1/+2
2023-11-10drm/amdgpu: Use correct KIQ MEC engine for gfx9.4.3 (v5)Victor Lu1-2/+2
2023-11-10drm/amdgpu: Add xcc param to SRIOV kiq write and WREG32_SOC15_IP_NO_KIQ (v4)Victor Lu1-2/+3
2023-11-07drm/amd: Disable XNACK on SRIOV environmentSurbhi Kakarya1-0/+10
2023-09-20drm/amdgpu: Use function for IP version checkLijo Lazar1-2/+2
2023-08-09drm/amdgpu: Clean up errors in amdgpu_virt.cRan Sun1-1/+1
2023-07-25drm/amdgpu: load sdma ucode in the guest machineYuanShang1-0/+11
2023-07-25drm/amdgpu: set sw state to gfxoff after SR-IOV resetHorace Chen1-0/+10
2023-07-18drm/amdgpu: Add RLCG interface driver implementation for gfx v9.4.3 (v3)Victor Lu1-6/+11
2023-06-30drm/amdgpu: make mcbp a per device settingAlex Deucher1-3/+0
2023-06-09drm/amdgpu: add the accelerator PCIe classShiwu Zhang1-1/+1
2023-06-09drm/amdgpu: disable virtual display support on APP deviceYang Wang1-1/+2
2023-06-09drm/amdgpu: Remove IMU ucode in vf2pfYuanShang1-1/+0
2023-06-09drm/amdgpu: set default num_kcq to 2 under sriovYuBiao Wang1-0/+3
2023-06-09drm/amdgpu: Enable mcbp under sriov by defaultYuBiao Wang1-2/+2
2023-04-18drm/amdgpu: convert gfx.kiq to array type (v3)Le Ma1-1/+1
2023-02-15drm/amdgpu: Revert programming GRBM_GFX_* in RLCG interface to support GFX9Yifan Zha1-0/+4
2023-02-03drm/amdgpu: Remove writing GRBM_GFX_CNTL in RLCG interface under SRIOVYifan Zha1-2/+0
2023-01-04drm/amdgpu: use VRAM|GTT for a bunch of kernel allocationsChristian König1-1/+2
2022-12-15drm/amdgpu: Remove unnecessary domain argumentLuben Tuikov1-1/+0
2022-11-29drm/amdgpu: add drv_vram_usage_va for virt data exchangeTong Liu011-19/+35
2022-11-04drm/amdgpu: Disable MCBP from soc21 for SRIOVYiqing Yao1-0/+4
2022-10-24drm/amd: Add IMU fw version to fw version queriesDavid Francis1-0/+1
2022-10-18drm/amdgpu: set vm_update_mode=0 as default for Sienna Cichlid in SRIOV caseDanijel Slivka1-0/+6
2022-09-01drm/amdgpu/vcn: Add vcn/vcn1 in white list to load its firmware under sriovJane Jian1-1/+3
2022-09-01drm/amdgpu: Support PSP 13.0.10 on SR-IOVHorace Chen1-20/+42
2022-09-01drm/amdgpu: refine virtualization psp fw skip checkHorace Chen1-0/+29
2022-09-01drm/amdgpu: add CHIP_IP_DISCOVERY support for virtualizationHorace Chen1-0/+2
2022-06-30drm/amdgpu: enable mes to access registers v2Jack Xiao1-0/+6
2022-04-29drm/amdgpu: do not use passthrough mode in Xen dom0Marek Marczykowski-Górecki1-1/+3
2022-04-14drm/amd/amdgpu: Remove static from variable in RLCG Reg RWGavin Wan1-5/+5
2022-04-13drm/amd/amdgpu: Not request init data for MS_HYPERV with vega10Yongqiang Sun1-2/+10
2022-03-25drm/amdgpu: Fix spelling mistake "regiser" -> "register"Colin Ian King1-1/+1