Age | Commit message (Collapse) | Author | Files | Lines | |
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2022-08-17 | drm/amdgpu: add mode2 reset for sienna_cichlid | Victor Zhao | 1 | -0/+32 | |
To meet the requirement for multi container usecase which needs a quicker reset and not causing VRAM lost, adding the Mode2 reset handler for sienna_cichlid. v2: move skip mode2 flag part separately v3: remove the use of asic_reset_res Signed-off-by: Victor Zhao <Victor.Zhao@amd.com> Acked-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |