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path: root/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_optc.c
AgeCommit message (Expand)AuthorFilesLines
2023-11-30drm/amd/display: Refactor OPTC into component folderParandhaman K1-1621/+0
2023-06-15drm/amd/display: Clean up dcn10_optc.c kdocSrinivasan Shanmugam1-21/+36
2023-06-09drm/amd/display: Program OTG vtotal min/max selectors unconditionally for DCN1+Aurabindo Pillai1-12/+3
2023-06-09drm/amd/display: Clean FPGA code in dcQingqing Zhuo1-5/+3
2022-10-24drm/amd/display: Add events log to trace OPTC lock and unlockRodrigo Siqueira1-0/+5
2022-10-11drm/amd/display: Drop uncessary OTG lock checkRodrigo Siqueira1-10/+1
2022-10-11drm/amd/display: Use set_vtotal_min_max to configure OTG VTOTALRodrigo Siqueira1-14/+4
2022-10-06drm/amd/display: Remove OPTC lock checkRodrigo Siqueira1-11/+0
2022-09-19drm/amd/display: log vertical interrupt 1 for debugJosip Pavic1-0/+6
2022-08-17drm/amd/display: Fix comment typomin tang1-1/+1
2022-08-17drm/amd/display: Expand documentation for timingRodrigo Siqueira1-0/+14
2022-08-17drm/amd/display: Add basic kernel doc to CRC code under DCRodrigo Siqueira1-4/+21
2022-08-10drm/amd/display: clear optc underflow before turn off odm clockFudong Wang1-0/+5
2022-06-15drm/amd/display: FVA timing adjustmentCharlene Liu1-0/+1
2021-12-14drm/amd/display: fix function scopesIsabella Basso1-18/+2
2021-09-28drm/amd/display: Add an extra check for dcn10 OPTC data formatOliver Logush1-1/+1
2021-07-21drm/amd/display: log additional register state for debugJosip Pavic1-0/+6
2021-06-08drm/amd/display: Return last used DRR VTOTAL from DCJayendran Ramani1-0/+1
2021-06-04drm/amd/display: Add DCN3.1 OPTCNicholas Kazlauskas1-0/+11
2021-04-09drm/amd/display: Move vupdate keepout programming from DCN20 to DCN10Leo Li1-0/+16
2021-01-14drm/amd/display: enable HUBP blank behaviourBhawanpreet Lakha1-0/+11
2020-12-15drm/amd/display: delay fp2 programming until vactive before lockMartin Leung1-5/+8
2020-12-15drm/amd/display: HP Reverb G2 VR fails to light upAric Cyr1-1/+1
2020-11-05drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)Alex Deucher1-4/+1
2020-10-05drm/amd/display: Fix OPTC_DATA_FORMAT programmingDmytro Laktyushkin1-0/+11
2020-07-01drm/amdgpu/display: fix build without CONFIG_DRM_AMD_DC_DCN3_0Alex Deucher1-1/+4
2020-07-01drm/amd/display: Add DCN3 OPTCBhawanpreet Lakha1-1/+9
2020-04-09drm/amd/display: Revert to old formula in set_vtg_paramsAlvin Lee1-2/+4
2020-03-31drm/amd/display: Use double buffered DRR timing update by defaultNicholas Kazlauskas1-0/+18
2020-03-09drm/amd/display: writing stereo polarity register if swappedMartin Leung1-1/+1
2020-03-05drm/amd/display: change number of cursor policy for dml calculation.Yongqiang Sun1-4/+2
2020-01-16drm/amd/display: make PSR static screen entry within 30 msAnthony Koo1-5/+10
2019-11-13drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTEDBhawanpreet Lakha1-4/+0
2019-11-13drm/amd/display: Drop CONFIG_DRM_AMD_DC_DMUB guardsNicholas Kazlauskas1-4/+1
2019-11-13drm/amd/display: Add DMUB support to DCNicholas Kazlauskas1-0/+8
2019-10-11drm/amd/display: add more checks to validate seamless boot timingMartin Leung1-47/+13
2019-08-23drm/amd/display: Expose OTG_V_TOTAL_MID for HW DiagsBayan Zabihiyan1-0/+12
2019-08-23drm/amd/display: fix trigger not generated for freesyncYogesh Mohan Marimuthu1-0/+3
2019-08-15drm/amd/display: Add enum for H-timing divider modeQingqing Zhuo1-4/+5
2019-08-15drm/amd/display: update optc odm interface for more than 2 oppsDmytro Laktyushkin1-2/+1
2019-06-22drm/amd/display: do not need otg lock if otg is not activehersen wu1-1/+10
2019-06-22drm/amd/display: Add DSC support for Navi (v2)Harry Wentland1-0/+18
2019-05-31drm/amd/display: Ensure DRR triggers in BPEryk Brol1-0/+32
2019-05-24drm/amd/display: Program VTG params after programming Global SyncJoshua Aberback1-50/+65
2019-05-24drm/amd/display: stop external access to internal optc sync paramsDmytro Laktyushkin1-12/+35
2019-05-24drm/amd/display: move signal type out of otg dlg paramsDmytro Laktyushkin1-3/+3
2019-02-19drm/amd/display: Refactor for setup periodic interrupt.Yongqiang Sun1-115/+18
2019-02-06drm/amd/display: add n_vid_mul and half pix_rate for odmDmytro Laktyushkin1-2/+5
2019-02-06drm/amd/display: refactor out programming of vupdate interruptAnthony Koo1-11/+40
2019-02-06drm/amd/display: interface to check if timing can be seamlessAnthony Koo1-0/+59
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