summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/amd/display/dc/dml/dcn321
AgeCommit message (Expand)AuthorFilesLines
2023-10-09drm/amd/display: Introduce DML2Qingqing Zhuo1-0/+81
2023-06-23drm/amd/display: Disable DC Mode Capping On DCN321Austin Zheng1-5/+5
2023-06-23drm/amd/display: Add Clock Table Entry With Max DC ValuesAustin Zheng2-10/+86
2023-06-09drm/amd/display: Filter out AC mode frequencies on DC mode systemsAustin Zheng1-42/+102
2023-06-09drm/amd/display: clean up some inconsistent indentingJiapeng Chong1-121/+121
2023-06-09drm/amd/display: Clean FPGA code in dcQingqing Zhuo1-62/+58
2023-04-21drm/amd/display: Update bounding box values for DCN321Aurabindo Pillai1-12/+12
2023-03-07drm/amd/display: Update to correct min FCLK when construction BBAlvin Lee1-2/+3
2023-01-24drm/amd/display: adjust MALL size available for DCN32 and DCN321Samson Tam1-1/+4
2022-12-15drm/amd/display: Reduce expected sdp bandwidth for dcn321Dillon Varone1-1/+1
2022-11-23drm/amd/display: Update soc bounding box for dcn32/dcn321Dillon Varone1-4/+4
2022-11-10drm/amd/display: Enforce minimum prefetch time for low memclk on DCN32Dillon Varone1-0/+2
2022-11-01drm/amd/display: Add DSC delay factor workaroundGeorge Shen1-1/+4
2022-10-27drm/amd/display: Update latencies on DCN321Dillon Varone1-5/+5
2022-09-19drm/amd/display: Fix urgent latency override for DCN32/DCN321George Shen1-0/+1
2022-08-30drm/amd/display: clean up some inconsistent indentingsYang Li1-5/+8
2022-08-10drm/amd/display: Add a variable to update FCLK latencyAlvin Lee1-0/+7
2022-07-26drm/amd/display: Update DCN32 and DCN321 SR latenciesAlvin Lee1-2/+2
2022-07-25drm/amd/display: Drop FPU code from dcn321 resourceRodrigo Siqueira2-0/+448
2022-07-25drm/amd/display: Create dcn321_fpu fileRodrigo Siqueira2-0/+274
generated by cgit v1.2.3 (git 2.39.0) at 2024-08-08 10:12:50 +0300