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path: root/drivers/gpu/drm/i915/i915_reg.h
AgeCommit message (Expand)AuthorFilesLines
2016-06-14drm/i915/bxt: Add WaDisablePooledEuLoadBalancingFixarun.siluvery@linux.intel.com1-0/+1
2016-06-14drm/i915:bxt: Enable Pooled EU supportarun.siluvery@linux.intel.com1-0/+2
2016-06-13drm/i915/bxt: Sanitiy check the PHY lane power down statusImre Deak1-0/+9
2016-06-13drm/i915/bxt: Move DDI PHY enabling/disabling to the power well codeImre Deak1-0/+3
2016-06-13drm/i915/gen9: implement WaConextSwitchWithConcurrentTLBInvalidateTim Gore1-0/+4
2016-06-09Merge tag 'drm-intel-next-2016-06-06' of git://anongit.freedesktop.org/drm-in...Dave Airlie1-1/+1
2016-06-08drm/i915/gen9: Add WaFbcHighMemBwCorruptionAvoidanceMika Kuoppala1-0/+1
2016-06-08drm/i195/fbc: Add WaFbcNukeOnHostModifyMika Kuoppala1-0/+1
2016-06-08drm/i915/gen9: Add WaFbcWakeMemOnMika Kuoppala1-0/+1
2016-06-08drm/i915/gen9: Add WaEnableChickenDCPRMika Kuoppala1-0/+3
2016-06-08drm/i915/skl: Add WAC6entrylatencyMika Kuoppala1-0/+3
2016-06-08drm/i915: Add WaInsertDummyPushConstP for bxt and kblMika Kuoppala1-0/+1
2016-06-08drm/i915/kbl: Add WaDisableDynamicCreditSharingMika Kuoppala1-0/+3
2016-06-08drm/i915/kbl: Add WaDisableGamClockGatingMika Kuoppala1-0/+1
2016-06-08drm/i915/gen9: Enable must set chicken bits in config0 regMika Kuoppala1-0/+3
2016-06-08drm/i915/edp: Add WaKVMNotificationOnConfigChange:bdwMika Kuoppala1-0/+3
2016-06-08drm/i915/skl: Add WaDisableGafsUnitClkGatingMika Kuoppala1-0/+1
2016-06-06drm/i915/gen9: Add WaVFEStateAfterPipeControlwithMediaStateCleararun.siluvery@linux.intel.com1-0/+1
2016-06-06drm/i915/dsi: fix bxt split screen and color issueJani Nikula1-0/+2
2016-06-03drm/doc: Switch to sphinx/rst fixed-width quotingDaniel Vetter1-1/+1
2016-06-01drm/i915: Update GEN6_PMINTRMSK setup with GuC enabledSagar Arun Kamble1-1/+1
2016-05-20drm/i915/psr: Implement PSR2 w/a for gen9Daniel Vetter1-0/+1
2016-05-13drm/i915: Program BXT_CDCLK_CD2X_PIPEVille Syrjälä1-2/+3
2016-05-03drm/i915/chv: Tune L3 SQC credits based on actual latenciesImre Deak1-0/+6
2016-05-03drm/i915: Clean up L3 SQC register field definitionsImre Deak1-2/+2
2016-04-28drm/i915: Update CDCLK_FREQ register on BDW after changing cdclk frequencyVille Syrjälä1-0/+2
2016-04-27drm/i915: Update RAWCLK_FREQ register on VLV/CHVVille Syrjälä1-0/+2
2016-04-25drm/i915:bxt: implement WaProgramL3SqcReg1DefaultForPerfTim Gore1-0/+1
2016-04-24drm/i915: Macros to convert PM time interval values to microsecondsAkash Goel1-0/+9
2016-04-22drm/i915: Make RPS EI/thresholds multiple of 25 on SNB-BDWVille Syrjälä1-1/+8
2016-04-20drm/i915/gen9: implement WaEnableSamplerGPGPUPreemptionSupportTim Gore1-0/+1
2016-04-19drm/i915: Clean up PCI config register handlingJoonas Lahtinen1-10/+28
2016-04-15drm/i915/bxt: Fix GRC code register field definitionsImre Deak1-7/+3
2016-04-14drm/i915: Ignore GTFIFODBG FIFO free entry fields on CHVVille Syrjälä1-0/+2
2016-04-14drm/i915: Calculate edram sizeMika Kuoppala1-0/+3
2016-04-14drm/i915: Store and use edram capabilitiesMika Kuoppala1-1/+1
2016-04-11drm/i915: implement WaClearTdlStateAckDirtyBitsTim Gore1-0/+12
2016-04-06drm/i915: Set invert bit for hpd based on VBTShubhangi Shrivastava1-0/+6
2016-04-05drm/i915: Use GPLL ref clock to calculate GPU freqs on VLV/CHVVille Syrjälä1-0/+1
2016-04-05drm/i915/guc: reset GuC and retry on firmware load failureArun Siluvery1-0/+1
2016-04-05drm/i915/chv: add more IOSF port definitionsJani Nikula1-0/+4
2016-04-01drm/i915: Implement WaPixelRepeatModeFixForC0:chvVille Syrjälä1-0/+4
2016-04-01drm/i915: BXT DDI PHY sequence BUNVandana Kannan1-0/+1
2016-03-24drm/i915/bxt: Fix DSI HW state readoutImre Deak1-0/+2
2016-03-22drm/i915/bxt: Initialize MIPI DSI for BXTShashank Sharma1-0/+1
2016-03-21drm/i915: Implement color management on chvLionel Landwerlin1-0/+31
2016-03-21drm/i915: Implement color management on bdw/skl/bxt/kblLionel Landwerlin1-0/+22
2016-03-21drm/i915: Add Haswell CS GPR registers to whitelistJordan Justen1-0/+4
2016-03-18drm/i915/gen9: add WaClearFlowControlGpgpuContextSaveTim Gore1-0/+1
2016-03-17drm/i915: Modify reset func to handle per engine resetsMika Kuoppala1-0/+2
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