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path: root/drivers/gpu/drm/i915
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2023-04-03drm/i915/tc: Add asserts in TC PHY hooks that the required power is onImre Deak1-0/+61
2023-04-03drm/i915/tc: Add TC PHY hook to get the TC-cold blocking power domainImre Deak1-14/+59
2023-04-03drm/i915/tc: Drop tc_cold_block()/unblock()'s power domain parameterImre Deak1-24/+37
2023-04-03drm/i915/tc: Remove redundant wakeref=0 check from unblock_tc_cold()Imre Deak1-8/+0
2023-04-03drm/i915/tc: Block/unblock TC-cold in the PHY connect/disconnect hooksImre Deak1-30/+13
2023-04-03drm/i915/tc: Check TC mode instead of the VBT legacy flagImre Deak1-8/+7
2023-04-03drm/i915/tc: Fix up the legacy VBT flag only in disconnected modeImre Deak1-3/+10
2023-04-03drm/i915/tc: Add TC PHY hooks to connect/disconnect the PHYImre Deak1-3/+9
2023-04-03drm/i915/tc: Factor out tc_phy_verify_legacy_or_dp_alt_mode()Imre Deak1-18/+29
2023-04-03drm/i915/tc: Add generic TC PHY connect/disconnect handlersImre Deak1-26/+39
2023-04-03drm/i915/tc: Add TC PHY hook to read out the PHY HW stateImre Deak1-10/+24
2023-04-03drm/i915/tc: Add TC PHY hooks to get the PHY ready/owned stateImre Deak1-12/+8
2023-04-03drm/i915/tc: Add TC PHY hook to get the PHY HPD live statusImre Deak1-11/+29
2023-04-03drm/i915/tc: Move the intel_tc_port struct declaration to intel_tc.cImre Deak4-37/+49
2023-04-03drm/i915/tc: Check for TC PHY explicitly in intel_tc_port_fia_max_lane_count()Imre Deak1-1/+2
2023-04-03drm/i915/tc: Move TC port fields to a new intel_tc_port structImre Deak4-289/+335
2023-04-03drm/i915/tc: Use the tc_phy prefix for all TC PHY functionsImre Deak1-15/+15
2023-04-03drm/i915/tc: Rename tc_phy_status_complete() to tc_phy_is_ready()Imre Deak1-12/+12
2023-04-03drm/i915/tc: Use the adlp prefix for ADLP TC PHY functionsImre Deak1-9/+9
2023-04-03drm/i915/tc: Group the TC PHY setup/query functions per platformImre Deak1-114/+130
2023-04-03drm/i915/dsc: Add debugfs entry to validate DSC output formatsSwati Sharma5-2/+87
2023-04-03drm/i915/vdsc: Check slice design requirementSuraj Kandpal1-0/+32
2023-04-03drm/i915/dsc: Fill in native_420 fieldSuraj Kandpal3-16/+100
2023-04-03drm/i915/dsc: Enable YCbCr420 for VDSCSuraj Kandpal3-15/+180
2023-04-03drm/i915/dsc: Adding the new registers for DSCSuraj Kandpal1-0/+28
2023-04-03drm/i915/dp: Check if DSC supports the given output_formatAnkit Nautiyal1-0/+28
2023-03-31drm/i915: Define cursor chicken regVille Syrjälä1-0/+2
2023-03-31drm/i915: Document that PLANE_CHICKEN are for tgl+Ville Syrjälä1-2/+2
2023-03-31drm/i915: Skip cursor when writing PLANE_CHICKENVille Syrjälä1-1/+5
2023-03-31drm/i915: Fix context runtime accountingTvrtko Ursulin1-2/+10
2023-03-31drm/i915/psr: Implement Display WA #1136Jouni Högander2-5/+7
2023-03-31drm/i915/psr: Check that vblank is long enough for psr2Jouni Högander1-0/+9
2023-03-31drm/i915/psr: Add helpers for block count number handlingJouni Högander1-4/+14
2023-03-31drm/i915/psr: Implement Wa_14015648006Jouni Högander3-3/+21
2023-03-31drm/i915/psr: Modify/Fix Wa_16013835468 and prepare for Wa_14015648006Jouni Högander1-11/+24
2023-03-31drm/i915/psr: Unify pre/post hooksJouni Högander1-6/+5
2023-03-31drm/i915/mtl: Fix MTL stolen memory GGTT mappingDaniele Ceraolo Spurio1-8/+7
2023-03-30drm/i915/mtl: Add Wa_22015279794Radhakrishna Sripada2-0/+11
2023-03-30drm/i915/mtl: Add workarounds Wa_14017066071 and Wa_14017654203Radhakrishna Sripada2-0/+10
2023-03-30drm/i915/dsb: split out DSB regs to a separate fileJani Nikula3-56/+68
2023-03-30drm/i915/fdi: split out FDI regs to a separate fileJani Nikula8-141/+157
2023-03-30drm/i915/aux: split out DP AUX regs to a separate fileJani Nikula7-73/+89
2023-03-30drm/i915/tv: split out TV regs to a separate fileJani Nikula3-480/+492
2023-03-30drm/i915/pps: split out PPS regs to a separate fileJani Nikula7-67/+83
2023-03-30drm/i915: Make utility pin asserts more accurateVille Syrjälä2-4/+8
2023-03-29Merge v6.3-rc4 into drm-nextDaniel Vetter2-3/+3
2023-03-29drm/i915: fix race condition UAF in i915_perf_add_config_ioctlMin Li1-3/+3
2023-03-29drm/i915: Use compressed bpp when calculating m/n value for DP MST DSCStanislav Lisovskiy1-1/+1
2023-03-28drm/i915/gsc: implement wa 14015076503Daniele Ceraolo Spurio3-7/+93
2023-03-28drm/i915: limit double GT reset to pre-MTLDaniele Ceraolo Spurio1-15/+20
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