summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/msm/adreno/a6xx_gpu_state.h
AgeCommit message (Collapse)AuthorFilesLines
2023-07-15drm/msm/adreno: Fix snapshot BINDLESS_DATA sizeRob Clark1-1/+1
The incorrect size was causing "CP | AHB bus error" when snapshotting the GPU state on a6xx gen4 (a660 family). Closes: https://gitlab.freedesktop.org/drm/msm/-/issues/26 Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Fixes: 1707add81551 ("drm/msm/a6xx: Add a6xx gpu state") Patchwork: https://patchwork.freedesktop.org/patch/546763/
2023-01-16drm/msm/a6xx: Update ROQ size in coredumpAkhil P Oommen1-7/+10
Since RoQ size differs between generations, calculate dynamically the RoQ size while capturing coredump. Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/515610/ Link: https://lore.kernel.org/r/20221221203925.v2.4.I07f22966395eb045f6b312710f53890d5d7e69d4@changeid Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-01-16drm/msm/a6xx: Update a6xx gpu coredumpAkhil P Oommen1-8/+41
Update gpu coredump for a660/a650 family of gpus with the extra information available. Signed-off-by: Akhil P Oommen <quic_akhilpo@quicinc.com> Patchwork: https://patchwork.freedesktop.org/patch/515608/ Link: https://lore.kernel.org/r/20221221203925.v2.3.Ifbfce6d693b202dac92006345bb825e7c5aee9c6@changeid Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-08-22drm/msm/a6xx: fix crashdec section name typoRob Clark1-1/+1
Backport note: maybe wait some time for the crashdec MR[1] to look for both the old typo'd name and the corrected name to land in mesa 20.2 [1] https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/6242 Fixes: 1707add81551 ("drm/msm/a6xx: Add a6xx gpu state") Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-07-31drm/msm/a6xx: fix crashstate capture for A650Jonathan Marek1-4/+8
A650 has a separate RSCC region, so dump RSCC registers separately, reading them from the RSCC base. Without this change a GPU hang will cause a system reset if CONFIG_DEV_COREDUMP is enabled. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2020-03-19drm/msm/a6xx: Fix CP_MEMPOOL state nameRob Clark1-1/+1
Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Jordan Crouse <jcrouse@codeaurora.org>
2020-01-03drm: msm: a6xx: Dump GBIF registers, debugbus in gpu stateSharat Masetty1-2/+14
Add the relevant GBIF registers and the debug bus to the a6xx gpu state. This comes in pretty handy when debugging GPU bus related issues. Signed-off-by: Sharat Masetty <smasetty@codeaurora.org> Signed-off-by: Rob Clark <robdclark@chromium.org>
2018-12-11drm/msm/a6xx: Add a6xx gpu stateJordan Crouse1-0/+430
Add support for gathering and dumping the a6xx GPU state including registers, GMU registers, indexed registers, shader blocks, context clusters and debugbus. v2: Fix bugs discovered by Sharat Masetty Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org> Signed-off-by: Rob Clark <robdclark@gmail.com>
generated by cgit v1.2.3 (git 2.39.0) at 2024-07-23 01:31:56 +0300