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path: root/drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgp102.c
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2020-07-24drm/nouveau/kms/nv50-: implement proper push buffer control logicBen Skeggs1-1/+1
We had a, what was supposed to be temporary, hack in the KMS code where we'd completely drain an EVO/NVD channel's push buffer when wrapping to the start again, instead of treating it as a ring buffer. Let's fix that, finally. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/disp/nv50-: add channel interfaces to control error interruptsBen Skeggs1-3/+1
This will be required to support Volta, but also allows us to remove code that's duplicated for each channel type already. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/disp/nv50-: add channel interfaces to determine the user areaBen Skeggs1-0/+1
This will be required to support Volta. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/disp/nv50-: merge handling of pio and dma channelsBen Skeggs1-8/+6
Unnecessarily complicated, and a barrier to cleanly supporting Volta. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2018-05-18drm/nouveau/disp/nv50-: replace user object with engine pointer in channelsBen Skeggs1-1/+1
More simplification. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
2016-11-17drm/nouveau/disp/gp102: rename from gp104Ben Skeggs1-0/+67
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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