summaryrefslogtreecommitdiff
path: root/drivers/gpu/drm/xe/regs
AgeCommit message (Expand)AuthorFilesLines
2024-04-16drm/xe: Allow to assign GGTT region to the VFMichal Wajdeczko1-0/+2
2024-04-15drm/xe/gt: Add L3 bank mask to GT topologyFrancois Dugast1-0/+3
2024-04-10drm/xe/xe2hpm: Add initial set of workaroundsGustavo Sousa1-0/+4
2024-04-10drm/xe/xe2hpg: Add initial GT workaroundsHaridhar Kalvala1-0/+5
2024-04-10drm/xe/xe2hpg: Determine flat ccs offset for vramHimal Prasad Ghimiray1-0/+5
2024-04-09drm/xe: Define xe_reg_is_validKarthik Poosa1-0/+5
2024-04-08drm/xe: Label RING_CONTEXT_CONTROL as maskedAshutosh Dixit1-1/+1
2024-04-05drm/xe: Move PTE/PDE bit definitions to proper headerMichal Wajdeczko1-0/+21
2024-04-02drm/xe/xe2: Add workaround 18033852989Himal Prasad Ghimiray1-1/+2
2024-03-28drm/xe/gsc: Implement WA 14018094691Daniele Ceraolo Spurio1-0/+3
2024-03-28drm/xe/vf: Add proper detection of the SR-IOV VF modeMichal Wajdeczko1-0/+3
2024-03-27drm/xe: Move HW GGTT definitions to dedicated fileMichal Wajdeczko1-0/+14
2024-03-20drm/xe/xelpg: Add Wa_14020495402Radhakrishna Sripada1-0/+1
2024-03-16drm/xe: Mark VF accessible interrupt registersMichal Wajdeczko1-17/+23
2024-03-16drm/xe: Mark VF accessible global registersMichal Wajdeczko1-1/+1
2024-03-16drm/xe: Mark VF accessible GuC registersMichal Wajdeczko1-4/+4
2024-03-16drm/xe: Define XE_REG_OPTION_VFMichal Wajdeczko1-0/+11
2024-03-16drm/xe: Assert size of the struct xe_regMichal Wajdeczko1-0/+3
2024-03-15drm/xe/gsc: Handle GSCCS ER interruptDaniele Ceraolo Spurio2-0/+8
2024-03-08drm/xe: Remove unused FF_SLICE_CS_CHICKEN2Lucas De Marchi1-3/+0
2024-02-23drm/xe: Cleanup some layering in GGTTMatthew Brost1-0/+7
2024-02-06drm/xe/hwmon: Refactor xe hwmonKarthik Poosa2-6/+21
2024-01-23drm/xe/xe2_lpg: Introduce performance guide changesShekhar Chauhan1-0/+6
2024-01-18drm/xe/gsc: add support for GSC proxy interruptDaniele Ceraolo Spurio1-0/+2
2024-01-09drm/xe/xe2_lpg: Add Wa_16018610683Shekhar Chauhan1-0/+3
2024-01-08drm/xe/xe2: synchronise CS_CHICKEN1 with WMTP supportNirmoy Das1-0/+1
2023-12-27drm/xe/xe2: Add workaround 16020183090Lucas De Marchi1-0/+4
2023-12-22drm/xe: Update definition of GT_INTR_DWMichal Wajdeczko1-0/+9
2023-12-22drm/xe: Update LRC context layout definitionsMichal Wajdeczko1-0/+9
2023-12-22drm/xe: Define registers used by memory based irq processingMichal Wajdeczko1-0/+2
2023-12-21drm/xe/pmu: Remove PMU from Xe till uapi is finalizedAshutosh Dixit1-5/+0
2023-12-21drm/xe: Re-sort GT register headerMatt Roper1-38/+38
2023-12-21drm/xe: Define interrupt vector bits with the interrupt registersMatt Roper2-6/+5
2023-12-21drm/xe: Move GSC HECI base offsets out of register headerMatt Roper1-4/+0
2023-12-21drm/xe: Move engine base offsets to engine register headerMatt Roper2-28/+33
2023-12-21drm/xe: Fix whitespace in register definitionsMatt Roper2-5/+5
2023-12-21drm/xe: Move some per-engine register definitions to the engine headerMatt Roper3-21/+21
2023-12-21drm/xe: Drop "_REG" suffix from CSFE_CHICKEN1Matt Roper1-5/+4
2023-12-21drm/xe/xe2: Updates on XY_CTRL_SURF_COPY_BLTHimal Prasad Ghimiray1-3/+2
2023-12-21drm/xe/xe2: Modify main memory to ccs memory ratio.Himal Prasad Ghimiray1-1/+1
2023-12-21drm/xe/xe2: Determine bios enablement for flat ccs on igfxHimal Prasad Ghimiray1-0/+3
2023-12-21drm/xe: Remove duplicate RING_MAX_NONPRIV_SLOTS definitionMatt Roper1-1/+0
2023-12-21drm/xe: Add frequency throttle reasons sysfs attributesSujaritha Sundaresan1-0/+12
2023-12-21drm/xe/pf: Introduce Local Memory Translation TableMichal Wajdeczko1-0/+17
2023-12-21drm/xe: Enable Fixed CCS mode settingNiranjana Vishwanathapura1-0/+14
2023-12-21drm/xe/xe2: Add workaround 18032095049 and 16021639441Tejas Upadhyay1-0/+5
2023-12-21drm/xe/xe2: Add workaround 14019988906Tejas Upadhyay1-0/+1
2023-12-21drm/xe/huc: Prepare for 2-step HuC authenticationDaniele Ceraolo Spurio1-0/+2
2023-12-21drm/xe: Expand XE_REG_OPTION_MASKED documentationLucas De Marchi1-1/+10
2023-12-21drm/xe/xe2: Add workaround 16020292621Tejas Upadhyay1-0/+1
generated by cgit v1.2.3 (git 2.39.0) at 2024-07-11 09:16:18 +0300