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path: root/drivers/iommu/intel
AgeCommit message (Expand)AuthorFilesLines
2021-08-19iommu/vt-d: Enable Intel IOMMU scalable mode by defaultLu Baolu2-1/+5
2021-08-19iommu/vt-d: Refactor Kconfig a bitLu Baolu2-19/+12
2021-08-19iommu/vt-d: Remove unnecessary oom messageZhen Lei2-7/+1
2021-08-19iommu/vt-d: Update the virtual command related registersLu Baolu1-5/+5
2021-08-18iommu/vt-d: Prepare for multiple DMA domain typesRobin Murphy1-9/+6
2021-08-18iommu/vt-d: Drop IOVA cookie managementRobin Murphy1-8/+0
2021-08-18iommu/vt-d: Fix incomplete cache flush in intel_pasid_tear_down_entry()Liu Yi L2-2/+14
2021-08-18iommu/vt-d: Fix PASID reference leakFenghua Yu1-1/+2
2021-07-26iommu/vt-d: Move clflush'es from iotlb_sync_map() to map_pages()Lu Baolu1-41/+7
2021-07-26iommu/vt-d: Implement map/unmap_pages() iommu_ops callbackLu Baolu1-2/+35
2021-07-26iommu/vt-d: Report real pgsize bitmap to iommu coreLu Baolu1-19/+19
2021-07-26iommu: Remove mode argument from iommu_set_dma_strict()John Garry1-3/+3
2021-07-26iommu/vt-d: Add support for IOMMU default DMA mode build optionsZhen Lei1-9/+6
2021-07-26iommu: Deprecate Intel and AMD cmdline methods to enable strict modeJohn Garry1-0/+1
2021-07-14iommu/vt-d: Fix clearing real DMA device's scalable-mode context entriesLu Baolu1-3/+2
2021-07-14iommu/vt-d: Global devTLB flush when present context entry changedSanjay Kumar1-9/+22
2021-06-25Merge branches 'iommu/fixes', 'arm/rockchip', 'arm/smmu', 'x86/vt-d', 'x86/am...Joerg Roedel9-403/+825
2021-06-25iommu/dma: Pass address limit rather than size to iommu_setup_dma_ops()Jean-Philippe Brucker1-4/+1
2021-06-18iommu/vt-d: Fix dereference of pointer info before it is null checkedColin Ian King1-2/+6
2021-06-10iommu/vt-d: Fix linker error on 32-bitJoerg Roedel1-3/+3
2021-06-10iommu/vt-d: No need to typecastParav Pandit1-3/+2
2021-06-10iommu/vt-d: Remove unnecessary bracesParav Pandit1-2/+1
2021-06-10iommu/vt-d: Removed unused iommu_count in dmar domainParav Pandit1-8/+3
2021-06-10iommu/vt-d: Use bitfields for DMAR capabilitiesParav Pandit1-9/+9
2021-06-10iommu/vt-d: Use DEVICE_ATTR_RO macroYueHaibing1-24/+18
2021-06-10iommu/vt-d: Fix out-bounds-warning in intel/svm.cGustavo A. R. Silva1-10/+16
2021-06-10iommu/vt-d: Add PRQ handling latency samplingLu Baolu1-3/+13
2021-06-10iommu/vt-d: Add cache invalidation latency samplingLu Baolu1-0/+31
2021-06-10iommu/vt-d: Expose latency monitor data through debugfsLu Baolu2-0/+112
2021-06-10iommu/vt-d: Add common code for dmar latency performance monitorsLu Baolu4-0/+243
2021-06-10iommu/vt-d: Add prq_report trace eventLu Baolu1-0/+7
2021-06-10iommu/vt-d: Report prq to io-pgfault frameworkLu Baolu2-81/+17
2021-06-10iommu/vt-d: Allocate/register iopf queue for sva devicesLu Baolu2-26/+77
2021-06-10iommu/vt-d: Refactor prq_event_thread()Lu Baolu1-103/+136
2021-06-10iommu/vt-d: Use common helper to lookup svm devicesLu Baolu1-28/+40
2021-06-10iommu/vt-d: Use iommu_sva_alloc(free)_pasid() helpersLu Baolu3-162/+120
2021-06-10iommu/vt-d: Add pasid private data helpersLu Baolu1-21/+41
2021-06-10iommu/vt-d: Support asynchronous IOMMU nested capabilitiesLu Baolu1-1/+8
2021-06-10iommu/vt-d: Select PCI_ATS explicitlyLu Baolu1-0/+1
2021-06-10iommu/vt-d: Tweak the description of a DMA faultLu Baolu1-8/+15
2021-06-10iommu/vt-d: Fix kernel-doc syntax in file headerAditya Srivastava1-1/+1
2021-06-10iommu/vt-d: Remove redundant assignment to variable agawColin Ian King1-1/+1
2021-05-27iommu/vt-d: Fix sysfs leak in alloc_iommu()Rolf Eike Beer1-1/+3
2021-05-19iommu/vt-d: Use user privilege for RID2PASID translationLu Baolu2-3/+7
2021-05-19iommu/vt-d: Check for allocation failure in aux_detach_device()Dan Carpenter1-0/+2
2021-05-05Merge tag 'pci-v5.13-changes' of git://git.kernel.org/pub/scm/linux/kernel/gi...Linus Torvalds1-1/+2
2021-04-16iommu: Streamline registration interfaceRobin Murphy2-5/+2
2021-04-16Merge branches 'iommu/fixes', 'arm/mediatek', 'arm/smmu', 'arm/exynos', 'unis...Joerg Roedel6-199/+264
2021-04-15iommu/vt-d: Force to flush iotlb before creating superpageLongpeng(Mike)1-14/+38
2021-04-15iommu/vt-d: Fix an error handling path in 'intel_prepare_irq_remapping()'Christophe JAILLET1-1/+1
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