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2021-06-08mmc: renesas_sdhi: Fix HS400 on R-Car M3-W+Geert Uytterhoeven1-1/+1
R-Car M3-W ES3.0 is marketed as R-Car M3-W+ (R8A77961), and has its own compatible value "renesas,r8a77961". Hence using soc_device_match() with soc_id = "r8a7796" and revision = "ES3.*" does not actually match running on an R-Car M3-W+ SoC. Fix this by matching with soc_id = "r8a77961" instead. Fixes: a38c078fea0b1393 ("mmc: renesas_sdhi: Avoid bad TAP in HS400") Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/ee8af5d631f5331139ffea714539030d97352e93.1622811525.git.geert+renesas@glider.be Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-06-08mmc: renesas_sdhi: abort tuning when timeout detectedWolfram Sang1-1/+6
We have to bring the eMMC from sending-data state back to transfer state once we detected a CRC error (timeout) during tuning. So, send a stop command via mmc_abort_tuning(). Fixes: 4f11997773b6 ("mmc: tmio: Add tuning support") Reported-by Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20210602073435.5955-1-wsa+renesas@sang-engineering.com Cc: stable@vger.kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-05-10mmc: sdhci-pci-gli: increase 1.8V regulator waitDaniel Beer1-1/+6
Inserting an SD-card on an Intel NUC10i3FNK4 (which contains a GL9755) results in the message: mmc0: 1.8V regulator output did not become stable Following this message, some cards work (sometimes), but most cards fail with EILSEQ. This behaviour is observed on Debian 10 running kernel 4.19.188, but also with 5.8.18 and 5.11.15. The driver currently waits 5ms after switching on the 1.8V regulator for it to become stable. Increasing this to 10ms gets rid of the warning about stability, but most cards still fail. Increasing it to 20ms gets some cards working (a 32GB Samsung micro SD works, a 128GB ADATA doesn't). At 50ms, the ADATA works most of the time, and at 100ms both cards work reliably. Signed-off-by: Daniel Beer <dlbeer@gmail.com> Acked-by: Ben Chuang <benchuanggli@gmail.com> Fixes: e51df6ce668a ("mmc: host: sdhci-pci: Add Genesys Logic GL975x support") Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20210424081652.GA16047@nyquist.nev Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-05-10mmc: meson-gx: also check SD_IO_RW_EXTENDED for scatterlist size alignmentNeil Armstrong1-1/+2
The brcmfmac driver can generate a scatterlist from a skb with each packets not aligned to the block size. This is not supported by the Amlogic Descriptor dma engine where each descriptor must match a multiple of the block size. The sg list is valid, since the sum of the sg buffers is a multiple of the block size, but we must discard those when in SD_IO_RW_EXTENDED mode since SDIO block mode can be used under the hood even with data->blocks == 1. Those transfers are very rare, thus can be replaced by a bounce buffer without real performance loss. Fixes: 7412dee9f1fd ("mmc: meson-gx: replace WARN_ONCE with dev_warn_once about scatterlist size alignment in block mode") Cc: stable@vger.kernel.org Reported-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20210426175559.3110575-2-narmstrong@baylibre.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-05-10mmc: meson-gx: make replace WARN_ONCE with dev_warn_once about scatterlist ↵Neil Armstrong1-1/+3
offset alignment Some drivers like ath10k can sometimg give an sg buffer with an offset whose alignment is not compatible with the Amlogic DMA descriptor engine requirements. Simply replace with dev_warn_once() to inform user this should be fixed to avoid degraded performance. This should be ultimately fixed in ath10k, but since it's only a performance issue the warning should be removed. Fixes: 79ed05e329c3 ("mmc: meson-gx: add support for descriptor chain mode") Cc: stable@vger.kernel.org Reported-by: Christian Hewitt <christianshewitt@gmail.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Acked-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> Link: https://lore.kernel.org/r/20210426175559.3110575-1-narmstrong@baylibre.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-29Merge tag 'mmc-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmcLinus Torvalds46-552/+818
Pull MMC and MEMSTICK updates from Ulf Hansson: "MMC core: - Fix hanging on I/O during system suspend for removable cards - Set read only for SD cards with permanent write protect bit - Power cycle the SD/SDIO card if CMD11 fails for UHS voltage - Issue a cache flush for eMMC only when it's enabled - Adopt to updated cache ctrl settings for eMMC from MMC ioctls - Use use device property API when parsing voltages - Don't retry eMMC sanitize cmds - Use the timeout from the MMC ioctl for eMMC santize cmds MMC host: - mmc_spi: Make of_mmc_spi.c resource provider agnostic - mmc_spi: Use polling for card detect even without voltage-ranges - sdhci: Check for reset prior to DMA address unmap - sdhci-acpi: Add support for the AMDI0041 eMMC controller variant - sdhci-esdhc-imx: Depending on OF Kconfig and cleanup code - sdhci-pci: Add PCI IDs for Intel LKF - sdhci-pci: Fix initialization of some SD cards for Intel BYT - sdhci-pci-gli: Various improvements for GL97xx variants - sdhci-of-dwcmshc: Enable support for MMC_CAP_WAIT_WHILE_BUSY - sdhci-of-dwcmshc: Add ACPI support for BlueField-3 SoC - sdhci-of-dwcmshc: Add Rockchip platform support - tmio/renesas_sdhi: Extend support for reset and use a reset controller - tmio/renesas_sdhi: Enable support for MMC_CAP_WAIT_WHILE_BUSY - tmio/renesas_sdhi: Various improvements MEMSTICK: - Minor improvements/cleanups" * tag 'mmc-v5.13' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc: (79 commits) mmc: block: Issue a cache flush only when it's enabled memstick: r592: ignore kfifo_out() return code again mmc: block: Update ext_csd.cache_ctrl if it was written mmc: mmc_spi: Make of_mmc_spi.c resource provider agnostic mmc: mmc_spi: Use already parsed IRQ mmc: mmc_spi: Drop unused NO_IRQ definition mmc: mmc_spi: Set up polling even if voltage-ranges is not present mmc: core: Convert mmc_of_parse_voltage() to use device property API mmc: core: Correct descriptions in mmc_of_parse() mmc: dw_mmc-rockchip: Just set default sample value for legacy mode mmc: sdhci-s3c: constify uses of driver/match data mmc: sdhci-s3c: correct kerneldoc of sdhci_s3c_drv_data mmc: sdhci-s3c: simplify getting of_device_id match data mmc: tmio: always restore irq register mmc: sdhci-pci-gli: Enlarge ASPM L1 entry delay of GL975x mmc: core: Let eMMC sanitize not retry in case of timeout/failure mmc: core: Add a retries parameter to __mmc_switch function memstick: r592: remove unused variable mmc: sdhci-st: Remove unnecessary error log mmc: sdhci-msm: Remove unnecessary error log ...
2021-04-27Merge tag 'pm-5.13-rc1' of ↵Linus Torvalds1-14/+5
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm Pull power management updates from Rafael Wysocki: "These add some new hardware support (for example, IceLake-D idle states in intel_idle), fix some issues (for example, the handling of negative "sleep length" values in cpuidle governors), add new functionality to the existing drivers (for example, scale-invariance support in the ACPI CPPC cpufreq driver) and clean up code all over. Specifics: - Add idle states table for IceLake-D to the intel_idle driver and update IceLake-X C6 data in it (Artem Bityutskiy). - Fix the C7 idle state on Tegra114 in the tegra cpuidle driver and drop the unused do_idle() firmware call from it (Dmitry Osipenko). - Fix cpuidle-qcom-spm Kconfig entry (He Ying). - Fix handling of possible negative tick_nohz_get_next_hrtimer() return values of in cpuidle governors (Rafael Wysocki). - Add support for frequency-invariance to the ACPI CPPC cpufreq driver and update the frequency-invariance engine (FIE) to use it as needed (Viresh Kumar). - Simplify the default delay_us setting in the ACPI CPPC cpufreq driver (Tom Saeger). - Clean up frequency-related computations in the intel_pstate cpufreq driver (Rafael Wysocki). - Fix TBG parent setting for load levels in the armada-37xx cpufreq driver and drop the CPU PM clock .set_parent method for armada-37xx (Marek Behún). - Fix multiple issues in the armada-37xx cpufreq driver (Pali Rohár). - Fix handling of dev_pm_opp_of_cpumask_add_table() return values in cpufreq-dt to take the -EPROBE_DEFER one into acconut as appropriate (Quanyang Wang). - Fix format string in ia64-acpi-cpufreq (Sergei Trofimovich). - Drop the unused for_each_policy() macro from cpufreq (Shaokun Zhang). - Simplify computations in the schedutil cpufreq governor to avoid unnecessary overhead (Yue Hu). - Fix typos in the s5pv210 cpufreq driver (Bhaskar Chowdhury). - Fix cpufreq documentation links in Kconfig (Alexander Monakov). - Fix PCI device power state handling in pci_enable_device_flags() to avoid issuse in some cases when the device depends on an ACPI power resource (Rafael Wysocki). - Add missing documentation of pm_runtime_resume_and_get() (Alan Stern). - Add missing static inline stub for pm_runtime_has_no_callbacks() to pm_runtime.h and drop the unused try_to_freeze_nowarn() definition (YueHaibing). - Drop duplicate struct device declaration from pm.h and fix a structure type declaration in intel_rapl.h (Wan Jiabing). - Use dev_set_name() instead of an open-coded equivalent of it in the wakeup sources code and drop a redundant local variable initialization from it (Andy Shevchenko, Colin Ian King). - Use crc32 instead of md5 for e820 memory map integrity check during resume from hibernation on x86 (Chris von Recklinghausen). - Fix typos in comments in the system-wide and hibernation support code (Lu Jialin). - Modify the generic power domains (genpd) code to avoid resuming devices in the "prepare" phase of system-wide suspend and hibernation (Ulf Hansson). - Add Hygon Fam18h RAPL support to the intel_rapl power capping driver (Pu Wen). - Add MAINTAINERS entry for the dynamic thermal power management (DTPM) code (Daniel Lezcano). - Add devm variants of operating performance points (OPP) API functions and switch over some users of the OPP framework to the new resource-managed API (Yangtao Li and Dmitry Osipenko). - Update devfreq core: * Register devfreq devices as cooling devices on demand (Daniel Lezcano). * Add missing unlock opeation in devfreq_add_device() (Lukasz Luba). * Use the next frequency as resume_freq instead of the previous frequency when using the opp-suspend property (Dong Aisheng). * Check get_dev_status in devfreq_update_stats() (Dong Aisheng). * Fix set_freq path for the userspace governor in Kconfig (Dong Aisheng). * Remove invalid description of get_target_freq() (Dong Aisheng). - Update devfreq drivers: * imx8m-ddrc: Remove imx8m_ddrc_get_dev_status() and unneeded of_match_ptr() (Dong Aisheng, Fabio Estevam). * rk3399_dmc: dt-bindings: Add rockchip,pmu phandle and drop references to undefined symbols (Enric Balletbo i Serra, Gaël PORTAY). * rk3399_dmc: Use dev_err_probe() to simplify the code (Krzysztof Kozlowski). * imx-bus: Remove unneeded of_match_ptr() (Fabio Estevam). - Fix kernel-doc warnings in three places (Pierre-Louis Bossart). - Fix typo in the pm-graph utility code (Ricardo Ribalda)" * tag 'pm-5.13-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (74 commits) PM: wakeup: remove redundant assignment to variable retval PM: hibernate: x86: Use crc32 instead of md5 for hibernation e820 integrity check cpufreq: Kconfig: fix documentation links PM: wakeup: use dev_set_name() directly PM: runtime: Add documentation for pm_runtime_resume_and_get() cpufreq: intel_pstate: Simplify intel_pstate_update_perf_limits() cpufreq: armada-37xx: Fix module unloading cpufreq: armada-37xx: Remove cur_frequency variable cpufreq: armada-37xx: Fix determining base CPU frequency cpufreq: armada-37xx: Fix driver cleanup when registration failed clk: mvebu: armada-37xx-periph: Fix workaround for switching from L1 to L0 clk: mvebu: armada-37xx-periph: Fix switching CPU freq from 250 Mhz to 1 GHz cpufreq: armada-37xx: Fix the AVS value for load L1 clk: mvebu: armada-37xx-periph: remove .set_parent method for CPU PM clock cpufreq: armada-37xx: Fix setting TBG parent for load levels cpuidle: Fix ARM_QCOM_SPM_CPUIDLE configuration cpuidle: tegra: Remove do_idle firmware call cpuidle: tegra: Fix C7 idling state on Tegra114 PM: sleep: fix typos in comments cpufreq: Remove unused for_each_policy macro ...
2021-04-26mmc: block: Issue a cache flush only when it's enabledAvri Altman4-3/+21
In command queueing mode, the cache isn't flushed via the mmc_flush_cache() function, but instead by issuing a CMDQ_TASK_MGMT (CMD48) with a FLUSH_CACHE opcode. In this path, we need to check if cache has been enabled, before deciding to flush the cache, along the lines of what's being done in mmc_flush_cache(). To fix this problem, let's add a new bus ops callback ->cache_enabled() and implement it for the mmc bus type. In this way, the mmc block device driver can call it to know whether cache flushing should be done. Fixes: 1e8e55b67030 (mmc: block: Add CQE support) Cc: stable@vger.kernel.org Reported-by: Brendan Peter <bpeter@lytx.com> Signed-off-by: Avri Altman <avri.altman@wdc.com> Tested-by: Brendan Peter <bpeter@lytx.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20210425060207.2591-2-avri.altman@wdc.com Link: https://lore.kernel.org/r/20210425060207.2591-3-avri.altman@wdc.com [Ulf: Squashed the two patches and made some minor updates] Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-23mmc: block: Update ext_csd.cache_ctrl if it was writtenAvri Altman1-0/+12
The cache function can be turned ON and OFF by writing to the CACHE_CTRL byte (EXT_CSD byte [33]). However, card->ext_csd.cache_ctrl is only set on init if cache size > 0. Fix that by explicitly setting ext_csd.cache_ctrl on ext-csd write. Signed-off-by: Avri Altman <avri.altman@wdc.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20210420134641.57343-3-avri.altman@wdc.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-23mmc: mmc_spi: Make of_mmc_spi.c resource provider agnosticAndy Shevchenko2-6/+2
In order to use the same driver on non-OF platforms, make of_mmc_spi.c resource provider agnostic. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20210419112459.25241-6-andriy.shevchenko@linux.intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-23mmc: mmc_spi: Use already parsed IRQAndy Shevchenko1-2/+2
SPI core already parses and maps IRQ for us if provided. Use it instead of double parsing in mmc_spi_get_pdata(). Due to above, change condition, since SPI core can hold an error pointer as invalid IRQ. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20210419112459.25241-5-andriy.shevchenko@linux.intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-23mmc: mmc_spi: Drop unused NO_IRQ definitionAndy Shevchenko1-5/+0
After the commit 073350f7b562 ("mmc: mmc_spi: Fix return value evaluation of irq_of_parse_and_map()") the NO_IRQ is not used anymore, drop it for good. Fixes: 073350f7b562 ("mmc: mmc_spi: Fix return value evaluation of irq_of_parse_and_map()") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20210419112459.25241-4-andriy.shevchenko@linux.intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-23mmc: mmc_spi: Set up polling even if voltage-ranges is not presentAndy Shevchenko1-1/+1
When voltage-ranges property is not present the driver assumes that it is 3.3v (3.2v..3.4v). But at the same time it disallows polling. Fix that by dropping the comparison to 0 when no property is provided. While at it, mark voltage-ranges property optional as it was initially. Fixes: 9c43df57910b ("mmc_spi: Add support for OpenFirmware bindings") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20210419112459.25241-3-andriy.shevchenko@linux.intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-23mmc: core: Convert mmc_of_parse_voltage() to use device property APIAndy Shevchenko5-21/+40
mmc_of_parse() for a few years has been using device property API. Convert mmc_of_parse_voltage() as well. At the same time switch users to new API. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20210419112459.25241-2-andriy.shevchenko@linux.intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-23mmc: core: Correct descriptions in mmc_of_parse()Andy Shevchenko1-2/+2
Since it has been converted to use device property API, the function and field descriptions become outdated. Correct them. Fixes: 73a47a9bb3e2 ("mmc: core: Use device_property_read instead of of_property_read") Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20210419112459.25241-1-andriy.shevchenko@linux.intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-19Merge branch 'fixes' into nextUlf Hansson1-2/+3
2021-04-19mmc: meson-gx: replace WARN_ONCE with dev_warn_once about scatterlist size ↵Neil Armstrong1-2/+3
alignment in block mode Since commit e085b51c74cc ("mmc: meson-gx: check for scatterlist size alignment in block mode"), support for SDIO SD_IO_RW_EXTENDED transferts are properly filtered but some driver like brcmfmac still gives a block sg buffer size not aligned with SDIO block, triggerring a WARN_ONCE() with scary stacktrace even if the transfer works fine but with possible degraded performances. Simply replace with dev_warn_once() to inform user this should be fixed to avoid degraded performance. This should be ultimately fixed in brcmfmac, but since it's only a performance issue the warning should be removed. Fixes: e085b51c74cc ("mmc: meson-gx: check for scatterlist size alignment in block mode") Reported-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/20210416094347.2015896-1-narmstrong@baylibre.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-16mmc: dw_mmc-rockchip: Just set default sample value for legacy modeShawn Lin1-1/+1
.set_ios() is called from .resume() as well. For SDIO device which sets keep-power-in-suspend, nothing should be changed after resuming, as well as sample tuning value, since this value is tuned already. So we should not overwrite it with the default value. Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com> Link: https://lore.kernel.org/r/1618539454-182170-1-git-send-email-shawn.lin@rock-chips.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-15mmc: sdhci-s3c: constify uses of driver/match dataKrzysztof Kozlowski1-5/+5
The driver data (struct sdhci_s3c_drv_data) stored in of_device_id table is allocated as const and used only in const-way. Skip unnecessary const-away casts and convert all users to work with pointer to const. This is both more logical and safer. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Sylwester Nawrocki <snawrocki@kernel.org> Link: https://lore.kernel.org/r/20210415084412.51125-3-krzysztof.kozlowski@canonical.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-15mmc: sdhci-s3c: correct kerneldoc of sdhci_s3c_drv_dataKrzysztof Kozlowski1-1/+1
Correct the name of sdhci_s3c_drv_data structure in kerneldoc: drivers/mmc/host/sdhci-s3c.c:143: warning: expecting prototype for struct sdhci_s3c_driver_data. Prototype was for struct sdhci_s3c_drv_data instead Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Sylwester Nawrocki <snawrocki@kernel.org> Link: https://lore.kernel.org/r/20210415084412.51125-2-krzysztof.kozlowski@canonical.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-15mmc: sdhci-s3c: simplify getting of_device_id match dataKrzysztof Kozlowski1-9/+3
Use of_device_get_match_data() to make the code slightly smaller and to remove the of_device_id table forward declaration. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Reviewed-by: Sylwester Nawrocki <snawrocki@kernel.org> Link: https://lore.kernel.org/r/20210415084412.51125-1-krzysztof.kozlowski@canonical.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-15mmc: tmio: always restore irq registerWolfram Sang2-7/+6
Currently, only SDHI on R-Car Gen2+ reinitializes the irq register during reset but it should be done on all instances. We can move it from the SDHI driver to the TMIO core, because we now have the 'sd_irq_mask_all' variable which carries the proper value to use. That also means we can remove the initialization from tmio_mmc_probe() because it calls tmio_mmc_reset(), too. We only move that tmio_mmc_reset() call there a little to ensure 'sd_irq_mask_all' is properly set. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20210413083137.11171-1-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-15mmc: sdhci-pci-gli: Enlarge ASPM L1 entry delay of GL975xBen Chuang1-0/+32
GL975x enters ASPM L1 state after a short idle in default. Enlarge the idle period to 7.9us for improving the R/W performance. Signed-off-by: Ben Chuang <benchuanggli@gmail.com> Link: https://lore.kernel.org/r/20210415032637.5219-1-benchuanggli@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-15mmc: core: Let eMMC sanitize not retry in case of timeout/failureBean Huo1-2/+2
Not all commands need to be retried in case of a timeout/failure. This is the case for the eMMC sanitize command, for example, which is issued through the ioctl interface. More precisely, in case of timeout, retrying could make the user wait for a very long time as each retry loop could last for a couple of minutes. Therefore, let's not use retries for the eMMC sanitize command. Signed-off-by: Bean Huo <beanhuo@micron.com> Link: https://lore.kernel.org/r/20210414212236.346813-3-huobean@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-15mmc: core: Add a retries parameter to __mmc_switch functionBean Huo3-15/+16
Add command retries parameter to __mmc_switch(), let caller pass retries according to the caller's condition. Signed-off-by: Bean Huo <beanhuo@micron.com> Link: https://lore.kernel.org/r/20210414212236.346813-2-huobean@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-12Merge branch 'opp/linux-next' of ↵Rafael J. Wysocki1-14/+5
git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm Pull OPP (Operating Performance Points) framework updates for v5.13 from Viresh Kumar: "This adds devm variants for OPP APIs and updates few of the users as well (Yangtao Li and Dmitry Osipenko)." * 'opp/linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/pm: memory: samsung: exynos5422-dmc: Convert to use resource-managed OPP API drm/panfrost: Convert to use resource-managed OPP API drm/lima: Convert to use resource-managed OPP API mmc: sdhci-msm: Convert to use resource-managed OPP API spi: spi-qcom-qspi: Convert to use resource-managed OPP API spi: spi-geni-qcom: Convert to use resource-managed OPP API serial: qcom_geni_serial: Convert to use resource-managed OPP API opp: Change return type of devm_pm_opp_attach_genpd() opp: Change return type of devm_pm_opp_register_set_opp_helper() opp: Add devres wrapper for dev_pm_opp_of_add_table opp: Add devres wrapper for dev_pm_opp_set_supported_hw opp: Add devres wrapper for dev_pm_opp_set_regulators opp: Add devres wrapper for dev_pm_opp_set_clkname
2021-04-12mmc: sdhci-st: Remove unnecessary error logLaibin Qiu1-3/+1
devm_ioremap_resource() has recorded error log, so it's unnecessary to record log again. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Laibin Qiu <qiulaibin@huawei.com> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com> Link: https://lore.kernel.org/r/20210409023801.3326572-1-qiulaibin@huawei.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-12mmc: sdhci-msm: Remove unnecessary error logJia Yang1-6/+2
devm_ioremap_resource() has recorded error log, so it's unnecessary to record log again. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Jia Yang <jiayang5@huawei.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Link: https://lore.kernel.org/r/20210409015424.3277212-1-jiayang5@huawei.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-12mmc: owl-mmc: Remove unnecessary error logLaibin Qiu1-1/+0
devm_ioremap_resource() has recorded error log, so it's unnecessary to record log again. Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Laibin Qiu <qiulaibin@huawei.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Link: https://lore.kernel.org/r/20210409023349.3325907-1-qiulaibin@huawei.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-12mmc: renesas_sdhi: enable WAIT_WHILE_BUSYWolfram Sang2-5/+7
Now that we got the timeout handling in the driver correct, we can use this capability to avoid polling via the MMC core. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Link: https://lore.kernel.org/r/20210409094606.4317-1-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-12mmc: sdhci-tegra: Add required callbacks to set/clear CQE_EN bitAniruddha Tvs Rao1-0/+32
CMD8 is not supported with Command Queue Enabled. Add required callback to clear CQE_EN and CQE_INTR fields in the host controller register before sending CMD8. Add corresponding callback in the CQHCI resume path to re-enable CQE_EN and CQE_INTR fields. Reported-by: Kamal Mostafa <kamal@canonical.com> Tested-by: Kamal Mostafa <kamal@canonical.com> Signed-off-by: Aniruddha Tvs Rao <anrao@nvidia.com> Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Acked-by: Adrian Hunter <adrian.hunter@intel.com> Acked-by: Thierry Reding <treding@nvidia.com> Link: https://lore.kernel.org/r/20210407094617.770495-1-jonathanh@nvidia.com Cc: stable@vger.kernel.org # v5.10+ Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-12mmc: sdhci-pci-gli: Improve GL9763E L1 entry delay to increase battery lifeBen Chuang1-3/+3
For GL9763E, although there is the best performance at the maximum delay. Change the value to 20us in order to have better power consumption. This change may reduce the maximum performance by 10%. Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw> Link: https://lore.kernel.org/r/20210407093816.8863-1-benchuanggli@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-12mmc: moxart: Remove unused variable 'dma_time' and 'pio_time'Yang Li1-6/+4
Fixes the following W=1 kernel build warning(s): drivers/mmc/host/moxart-mmc.c:257:7: warning: variable ‘dma_time’ set but not used drivers/mmc/host/moxart-mmc.c:395:7: warning: variable ‘pio_time’ set but not used Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Link: https://lore.kernel.org/r/1617357231-93064-1-git-send-email-yang.lee@linux.alibaba.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-04-12mmc: core: Use userland specified timeout value for eMMC sanitizeBean Huo3-4/+7
As the density increases, the 4-minute timeout value for sanitize is no longer feasible. At the same time, devices of different densities have different timeout values, which makes it difficult to use a common timeout value. Therefore, let's pass down the userland-specified sanitize timeout value so it can be used. Signed-off-by: Bean Huo <beanhuo@micron.com> Link: https://lore.kernel.org/r/20210402092432.25069-2-huobean@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-31mmc: sdhci-pci: Fix initialization of some SD cards for Intel BYT-based ↵Adrian Hunter1-0/+27
controllers Bus power may control card power, but the full reset done by SDHCI at initialization still may not reset the power, whereas a direct write to SDHCI_POWER_CONTROL can. That might be needed to initialize correctly, if the card was left powered on previously. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/20210331081752.23621-1-adrian.hunter@intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-31mmc: dw_mmc-k3: use the correct HiSilicon copyrightHao Fang1-1/+1
s/Hisilicon/HiSilicon/g. It should use capital S, according to https://www.hisilicon.com/en/terms-of-use. Signed-off-by: Hao Fang <fanghao11@huawei.com> Acked-by: Zhangfei Gao <zhangfei.gao@linaro.org> Link: https://lore.kernel.org/r/1617086448-51054-1-git-send-email-fanghao11@huawei.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30mmc: sdhci-esdhc-imx: separate 100/200 MHz pinctrl states checkShawn Guo1-4/+4
As indicated by function esdhc_change_pinstate(), SDR50 and DDR50 require pins_100mhz, while SDR104 and HS400 require pins_200mhz. Some system design may support SDR50 and DDR50 with 100mhz pin state only (without 200mhz one). Currently the combined 100/200 MHz pinctrl state check prevents such system from running SDR50 and DDR50. Separate the check to support such system design. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Reviewed-by: Haibo Chen <haibo.chen@nxp.com> Link: https://lore.kernel.org/r/20210326110214.28416-1-shawnguo@kernel.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30mmc: sdhci-brcmstb: Remove CQE quirkAl Cooper1-1/+0
Remove the CQHCI_QUIRK_SHORT_TXFR_DESC_SZ quirk because the latest chips have this fixed and earlier chips have other CQE problems that prevent the feature from being enabled. Signed-off-by: Al Cooper <alcooperx@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Link: https://lore.kernel.org/r/20210325192834.42955-1-alcooperx@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30mmc: sdhci: replace mmc->parent with mmc_dev() for consistencyJisheng Zhang5-35/+35
As pointed out by Ulf, "both "mmc->parent" and mmc_dev(mmc) are being used in the entire c-file". Convert all the mmc->parent usage in all sdhci host driver to mmc_dev() for consistency. Suggested-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Link: https://lore.kernel.org/r/20210324155013.1e5faa3c@xhacker.debian Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30mmc: sdhci-of-dwcmshc: set MMC_CAP_WAIT_WHILE_BUSYJisheng Zhang1-0/+2
The host supports HW busy detection of the device busy signaling over dat0 line. Set MMC_CAP_wAIT_WHILE_BUSY host capability. Signed-off-by: Jisheng Zhang <Jisheng.Zhang@synaptics.com> Link: https://lore.kernel.org/r/20210324154703.69f97fde@xhacker.debian Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30mmc: sdhci-of-dwcmshc: fix error return code in dwcmshc_probe()Wei Yongjun1-1/+3
Fix to return negative error code -ENOMEM from the error handling case instead of 0, as done elsewhere in this function. Fixes: c2c4da37837e ("mmc: sdhci-of-dwcmshc: add rockchip platform support") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com> Link: https://lore.kernel.org/r/20210323112956.1016884-1-weiyongjun1@huawei.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30mmc: sdhci-of-dwcmshc: add ACPI support for BlueField-3 SoCLiming Sun1-14/+36
This commit adds ACPI support in the sdhci-of-dwcmshc driver for BlueField-3 SoC. It has changes to only use the clock hierarchy for Deviec Tree since the clk is not supported by ACPI. Instead, ACPI can define 'clock-frequency' which is parsed by existing sdhci_get_property(). This clock value will be returned in function dwcmshc_get_max_clock(). Signed-off-by: Liming Sun <limings@nvidia.com> Reviewed-by: Khalil Blaiech <kblaiech@nvidia.com> Link: https://lore.kernel.org/r/1616453211-275165-1-git-send-email-limings@nvidia.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30mmc: sdhci-pci: Add PCI IDs for Intel LKFAdrian Hunter2-0/+4
Add PCI IDs for Intel LKF eMMC and SD card host controllers. Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Link: https://lore.kernel.org/r/20210322055356.24923-1-adrian.hunter@intel.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30mmc: tmio: always flag retune when resetting and a card is presentWolfram Sang1-2/+3
After reset, we manually flagged retune in runtime resume, but missed it in the workqueue. To fix that and avoid the problem in the future, let's flag retune in the reset handler directly whenever a card is present. Reported-by: Takeshi Saito <takeshi.saito.xv@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210316085717.7276-3-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30mmc: tmio: restore bus width when resettingTakeshi Saito1-15/+17
Resetting the IP core will lose the bus width information and not all code paths recover it. So, make sure the latest bus width gets restored in the reset routine. For that, tmio_mmc_set_bus_width() is moved, but not modified. Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com> [wsa: reworded commit message] Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210316085717.7276-2-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30mmc: cavium: Use '"%s...", __func__' to print function nameBean Huo1-2/+1
Use preferred way '"%s...", __func__' to print function name. Signed-off-by: Bean Huo <beanhuo@micron.com> Link: https://lore.kernel.org/r/20210319121357.255176-2-huobean@gmail.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30mmc: sdhci-acpi: Add device ID for the AMDI0041 variant of the AMD eMMC ↵James Young1-0/+2
controller. This variant is present on a Lenovo IdeaPad Slim 1, which uses an AMD Dali/Athlon Silver 3050e. The Windows AMD SD Host Controller driver also lists this as a valid device ID. Adding this device ID makes the internal eMMC storage on the Lenovo accessible. Consequently this makes Linux installable and usable on it as well. Signed-off-by: James Young <james@pocketfluff.org> Link: https://lore.kernel.org/r/20210318124025.3002861-1-james@pocketfluff.org Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30mmc: renesas_sdhi: do hard reset if possibleWolfram Sang3-1/+19
All recent SDHI instances can be reset via the reset controller. If one is found, use it instead of the open coded reset. This is to get a future-proof sane reset state. Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210317091622.31890-4-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30mmc: renesas_sdhi: break SCC reset into own functionWolfram Sang1-10/+14
renesas_sdhi_reset used to mainly reset the SCC but is now doing more and even more will be added. So, factor out SCC reset to have a clear distinction when we want to reset either SCC or SDHI+SCC. Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210317091622.31890-3-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2021-03-30mmc: tmio: abort DMA before resetWolfram Sang1-2/+2
We will soon allow resetting the whole IP core via a reset controller. For this case, DMA must be terminated before the actual reset. For the other cases, it is probably better, too. Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210317091622.31890-2-wsa+renesas@sang-engineering.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
generated by cgit v1.2.3 (git 2.39.0) at 2024-08-17 20:08:54 +0300