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path: root/drivers/net/ethernet/xilinx/xilinx_axienet_main.c
AgeCommit message (Expand)AuthorFilesLines
2023-07-27net: axienet: Move reset before 64-bit DMA detectionMaxim Kochetkov1-5/+5
2022-04-20net: axienet: setup mdio unconditionallyAndy Chiu1-7/+6
2022-04-08net: axienet: fix RX ring refill allocation failure handlingRobert Hancock1-30/+42
2022-01-27net: axienet: increase default TX ring size to 128Robert Hancock1-1/+1
2022-01-27net: axienet: fix for TX busy handlingRobert Hancock1-39/+47
2022-01-27net: axienet: fix number of TX ring slots for available checkRobert Hancock1-2/+2
2022-01-27net: axienet: Fix TX ring slot available checkRobert Hancock1-2/+2
2022-01-27net: axienet: limit minimum TX ring sizeRobert Hancock1-1/+3
2022-01-27net: axienet: add missing memory barriersRobert Hancock1-1/+10
2022-01-27net: axienet: reset core on initialization prior to MDIO accessRobert Hancock1-0/+5
2022-01-27net: axienet: Wait for PhyRstCmplt after core resetRobert Hancock1-0/+10
2022-01-27net: axienet: increase reset timeoutRobert Hancock1-10/+9
2021-03-30net: axienet: Fix probe error cleanupRobert Hancock1-11/+24
2021-03-30net: axienet: Properly handle PCS/PMA PHY for 1000BaseX modeRobert Hancock1-26/+68
2021-03-04net: axienet: Handle deferred probe on clock properlyRobert Hancock1-14/+12
2020-09-07net: xilinx: remove redundant null check before clk_disable_unprepare()Zhang Changzhong1-2/+1
2020-03-25net: axienet: Allow DMA to beyond 4GBAndre Przywara1-0/+8
2020-03-25net: axienet: Autodetect 64-bit DMA capabilityAndre Przywara1-0/+26
2020-03-25net: axienet: Upgrade descriptors to hold 64-bit addressesAndre Przywara1-35/+78
2020-03-25net: axienet: Wrap DMA pointer writes to prepare for 64 bitAndre Przywara1-10/+16
2020-03-25net: axienet: Add mii-tool supportAndre Przywara1-0/+11
2020-03-25net: axienet: Drop MDIO interrupt registers from ethtools dumpAndre Przywara1-4/+0
2020-03-25net: axienet: Mark eth_irq as optionalAndre Przywara1-2/+2
2020-03-25net: axienet: Check for DMA mapping errorsAndre Przywara1-1/+30
2020-03-25net: axienet: Factor out TX descriptor chain cleanupAndre Przywara1-22/+57
2020-03-25net: axienet: Improve DMA error handlingAndre Przywara1-2/+2
2020-03-25net: axienet: Fix DMA descriptor cleanup pathAndre Przywara1-15/+28
2020-03-25net: axienet: Propagate failure of DMA descriptor setupAndre Przywara1-7/+19
2020-03-25net: axienet: Convert DMA error handler to a work queueAndre Przywara1-12/+12
2020-03-18net: axienet: let core reject the unsupported coalescing parametersJakub Kicinski1-21/+1
2020-02-27net: axienet: use resolved link config in mac_link_up()Russell King1-19/+19
2020-02-27net: phylink: propagate resolved link config via mac_link_up()Russell King1-3/+4
2019-11-24net: phylink: rename mac_link_state() op to mac_pcs_get_state()Russell King1-5/+3
2019-11-07net: axienet: Fix error return code in axienet_probe()Wei Yongjun1-4/+0
2019-11-04net: of_get_phy_mode: Change API to solve int/unit warningsAndrew Lunn1-4/+2
2019-09-27net: axienet: fix a signedness bug in probeDan Carpenter1-1/+1
2019-07-09net: axienet: fix a potential double free in axienet_probe()Wen Yang1-1/+0
2019-06-14net: axienet: move use of resource after validity checkRobert Hancock1-1/+1
2019-06-07net: axienet: convert to phylink APIRobert Hancock1-99/+187
2019-06-07net: axienet: make use of axistream-connected attribute optionalRobert Hancock1-15/+28
2019-06-07net: axienet: stop interface during shutdownRobert Hancock1-0/+14
2019-06-07net: axienet: Make missing MAC address non-fatalRobert Hancock1-2/+3
2019-06-07net: axienet: Fix race condition causing TX hangRobert Hancock1-3/+17
2019-06-07net: axienet: Add optional support for Ethernet core interruptRobert Hancock1-0/+49
2019-06-07net: axienet: Support shared interruptsRobert Hancock1-6/+8
2019-06-07net: axienet: Add DMA registers to ethtool register dumpRobert Hancock1-1/+9
2019-06-07net: axienet: Make RX/TX ring sizes configurableRobert Hancock1-25/+65
2019-06-07net: axienet: Cleanup DMA device reset and halt processRobert Hancock1-14/+40
2019-06-07net: axienet: Re-initialize MDIO registers properly after resetRobert Hancock1-23/+15
2019-06-07net: axienet: fix teardown order of MDIO busRobert Hancock1-1/+1
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