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path: root/drivers/net/ipa
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2022-09-28net: ipa: define more IPA endpoint register fieldsAlex Elder8-169/+336
Define the fields for the ENDP_INIT_MODE, ENDP_INIT_AGGR, ENDP_INIT_HOL_BLOCK_EN, and ENDP_INIT_HOL_BLOCK_TIMER IPA registers for all supported IPA versions. Create enumerated types to identify fields for these IPA registers. Use IPA_REG_STRIDE_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Change aggr_time_limit_encode() and hol_block_timer_encode() so they take an ipa_reg pointer, and use those register's fields to compute their encoded results. Have aggr_time_limit_encode() take an IPA pointer rather than version, to match hol_block_timer_encode(). Use ipa_reg_encode(), ipa_reg_bit(), and ipa_reg_field_max() to manipulate values to be written to these registers, remove the definitions of the various inline functions and *_FMASK symbols that are now no longer used. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-28net: ipa: define some IPA endpoint register fieldsAlex Elder8-119/+374
Define the fields for the ENDP_INIT_CTRL, ENDP_INIT_CFG, ENDP_INIT_NAT, ENDP_INIT_HDR, and ENDP_INIT_HDR_EXT IPA registers for all supported IPA versions. Create enumerated types to identify fields for these IPA registers. Use IPA_REG_STRIDE_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Move ipa_header_size_encoded() and ipa_metadata_offset_encoded() out of "ipa_reg.h" and into "ipa_endpoint.c". Change them so they take an additional ipa_reg structure argument, and use ipa_reg_encode() to encode the parts of the header size and offset prior to writing to the register. Change their names to be verbs rather than nouns. Use ipa_reg_encode(), ipa_reg_bit, and ipa_reg_field_max() to manipulate values to be written to these registers, remove the definition of the no-longer-used *_FMASK symbols. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-28net: ipa: define resource group/type IPA register fieldsAlex Elder8-94/+419
Define the fields for the {SRC,DST}_RSRC_GRP_{01,23,45,67}_RSRC_TYPE IPA registers for all supported IPA versions. Create enumerated types to identify fields for these IPA registers. Use IPA_REG_STRIDE_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Use ipa_reg_encode() to build up the values to be written to these registers. Remove the definition of the no-longer-used *_FMASK symbols. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-28net: ipa: define even more IPA register fieldsAlex Elder8-50/+213
Define the fields for the FLAVOR_0, IDLE_INDICATION_CFG, QTIME_TIMESTAMP_CFG, TIMERS_XO_CLK_DIV_CFG and TIMERS_PULSE_GRAN_CFG IPA registers for all supported IPA versions. Create enumerated types to identify fields for these IPA registers. Use IPA_REG_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Use ipa_reg_bit() and ipa_reg_encode() to build up the values to be written to these registers. Use ipa_reg_decode() to extract field values from the FLAVOR_0 register. Remove the definition of the no-longer-used *_FMASK symbols. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-28net: ipa: define more IPA register fieldsAlex Elder9-48/+146
Define the fields for the LOCAL_PKT_PROC_CNTXT, COUNTER_CFG, and IPA_TX_CFG IPA registers for all supported IPA versions. Create enumerated types to identify fields for these IPA registers. Use IPA_REG_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Use ipa_reg_bit() and ipa_reg_encode() to build up the values to be written to these registers. Remove the definition of the *_FMASK symbols as well as proc_cntxt_base_addr_encoded(), because they are no longer needed. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-28net: ipa: define some more IPA register fieldsAlex Elder10-57/+311
Define the fields for the SHARED_MEM_SIZE, QSB_MAX_WRITES, QSB_MAX_READS, FILT_ROUT_HASH_EN, and FILT_ROUT_HASH_FLUSH IPA registers for all supported IPA versions. Create enumerated types to identify fields for these registers. Use IPA_REG_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Use ipa_reg_bit() and ipa_reg_encode() to build up the values to be written to these registers rather than using the *_FMASK preprocessor symbols. Remove the definition of the now unused *_FMASK symbols. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-28net: ipa: define CLKON_CFG and ROUTE IPA register fieldsAlex Elder9-65/+319
Create the ipa_reg_clkon_cfg_field_id enumerated type, which identifies the fields for the CLKON_CFG IPA register. Add "CLKON_" to a few short names to try to avoid name conflicts. Create the ipa_reg_route_field_id enumerated type, which identifies the fields for the ROUTE IPA register. Use IPA_REG_FIELDS() to specify the field mask values defined for these registers, for each supported version of IPA. Use ipa_reg_bit() and ipa_reg_encode() to build up the values to be written to these registers rather than using the *_FMASK preprocessor symbols. Remove the definition of the now unused *_FMASK symbols. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-28net: ipa: define COMP_CFG IPA register fieldsAlex Elder8-70/+160
Create the ipa_reg_comp_cfg_field_id enumerated type, which identifies the fields for the COMP_CFG IPA register. Use IPA_REG_FIELDS() to specify the field mask values defined for this register, for each supported version of IPA. Use ipa_reg_bit() to build up the value to be written to this register rather than using the *_FMASK preprocessor symbols. Remove the definition of the *_FMASK symbols, along with the inline functions that were used to encode certain fields whose position and/or width within the register was dependent on IPA version. Take this opportunity to represent all one-bit fields using BIT(x) rather than GENMASK(x, x). Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-28net: ipa: introduce ipa_reg field masksAlex Elder1-0/+68
Add register field descriptors to the ipa_reg structure. A field in a register is defined by a field mask, which is a 32-bit mask having a single contiguous range of bits set. For each register that has at least one field defined, an enumerated type will identify the register's fields. The ipa_reg structure for that register will include an array fmask[] of field masks, indexed by that enumerated type. Each field mask defines the position and bit width of a field. An additional "fcount" records how many fields (masks) are defined for a given register. Introduce two macros to be used to define registers that have at least one field. Introduce a few new functions related to field masks. The first simply returns a field mask, given an IPA register pointer and field mask ID. A variant of that is meant to be used for the special case of single-bit field masks. Next, ipa_reg_encode(), identifies a field with an IPA register pointer and a field ID, and takes a value to represent in that field. The result encodes the value in the appropriate place to be stored in the register. This is roughly modeled after the bitmask operations (like u32_encode_bits()). Another function (ipa_reg_decode()) similarly identifies a register field, but the value supplied to it represents a full register value. The value encoded in the field is extracted from the value and returned. This is also roughly modeled after bitmask operations (such as u32_get_bits()). Finally, ipa_reg_field_max() returns the maximum value representable by a field. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-28net: ipa: introduce ipa_reg()Alex Elder10-144/+195
Create a new function that returns a register descriptor given its ID. Change ipa_reg_offset() and ipa_reg_n_offset() so they take a register descriptor argument rather than an IPA pointer and register ID. Have them accept null pointers (and return an invalid 0 offset), to avoid the need for excessive error checking. (A warning is issued whenever ipa_reg() returns 0). Call ipa_reg() or ipa_reg_n() to look up information about the register before calls to ipa_reg_offset() and ipa_reg_n_offset(). Delay looking up offsets until they're needed to read or write registers. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-28net: ipa: use ipa_reg[] array for register offsetsAlex Elder2-334/+37
Use the array of register descriptors assigned at initialization time to determine the offset (and where used, stride) for IPA registers. Issue a warning if an offset is requested for a register that's not valid for the current system. Remove all IPE_REG_*_OFFSET macros, as well as inline static functions that returned register offsets. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-28net: ipa: add per-version IPA register definition filesAlex Elder10-3/+1044
Create a new subdirectory "reg", which contains a register definition file for each supported version of IPA. Each register definition contains the register's offset, and for parameterized registers, the stride (distance between consecutive instances of the register). Finally, it includes an all-caps printable register name. In these files, each IPA version defines an array of IPA register definition pointers, with unsupported registers defined with a null pointer. The array is indexed by the ipa_reg_id enumerated type. At initialization time, the appropriate register definition array to use is selected based on the IPA version, and assigned to a new "regs" field in the IPA structure. Extend ipa_reg_valid() so it fails if a valid register is not defined. This patch simply puts this infrastructure in place; the next will use it. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-28net: ipa: use IPA register IDs to determine offsetsAlex Elder10-87/+271
Expose two inline functions that return the offset for a register whose ID is provided; one of them takes an additional argument that's used for registers that are parameterized. These both use a common helper function __ipa_reg_offset(), which just uses the offset symbols already defined. Replace all references to the offset macros defined for IPA registers with calls to ipa_reg_offset() or ipa_reg_n_offset(). Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-28net: ipa: introduce IPA register IDsAlex Elder2-0/+113
Create a new ipa_reg_id enumerated type, which identifies each IPA register with a symbolic identifier. Use short names, but in some cases (such as "BCR") add "IPA_" to the name to help avoid name conflicts. Create two functions that indicate register validity. The first concisely indicates whether a register is valid for a given version of IPA, and if so, whether it is defined. The second indicates whether a register is valid for TX or RX endpoints. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-24net: ipa: encapsulate updating three more registersAlex Elder1-26/+53
Create a new function that encapsulates setting the BCR, TX_CFG, and CLKON_CFG register values during hardware configuration. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-24net: ipa: encapsulate updating the COUNTER_CFG registerAlex Elder1-13/+22
Create a new function that encapsulates setting the counter configuration register value for versions prior to IPA v4.5. Create another small function to represent configuring hardware timing regardless of version. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-24net: ipa: encapsulate setting the FILT_ROUT_HASH_EN registerAlex Elder1-8/+13
Create a new function that encapsulates setting the register flag that disables filter and routing table hashing for IPA v4.2. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-24net: ipa: tidy up register enum definitionsAlex Elder1-21/+21
Update a few enumerated type definitions in "ipa_reg.h" so that the values assigned to each member align on the same column. Where a "TX" or "RX" (or both) comment is present, move that annotation into a separate comment between the member name and its value. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-24net: ipa: define BCR values using an enumAlex Elder3-20/+18
The backward compatibility register (BCR) has a set of bit flags that indicate ways in which the IPA hardware should operate in a backward compatible way. The register is not supported starting with IPA v4.5, and where it is supported, defined bits all have the same numeric value. Redefine these flags using an enumerated type, with each member's value representing the bit position that encodes it in the BCR. This replaces all of the single-bit field masks previously defined. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-24net: ipa: rearrange functions for similarityAlex Elder1-46/+42
Both aggr_time_limit_encode() and hol_block_timer_encode() figure out how to encode a millisecond time value so it can be programmed into a register. Rearranging them a bit can make their similarity more obvious, with both taking essentially the same form. To do this: - Return 0 immediately in aggr_time_limit_encode() if the microseconds value supplied is zero. - Reverse the test at top of aggr_time_limit_encode(), so we compute and return the Qtime value in the "true" block, and compute the result the old way otherwise. - Open-code (and eliminate) hol_block_timer_qtime_encode() at the top of hol_block_timer_encode() in the case we use Qtimer. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-24net: ipa: introduce ipa_qtime_val()Alex Elder1-36/+44
Create a new function ipa_qtime_val() which returns a value that indicates what should be encoded for a register with a time field expressed using Qtime. Use it to factor out common code in aggr_time_limit_encoded() and hol_block_timer_qtime_val(). Rename aggr_time_limit_encoded() and hol_block_timer_qtime_val() so their names are both verbs ending in "encode". Rename the "limit" argument to the former to be "milliseconds" for consistency. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-24net: ipa: don't use u32p_replace_bits()Alex Elder1-2/+2
In two spots we use u32_replace_bits() to replace a set of bits in a register while preserving the rest. Both of those cases just zero the bits being replaced, and this can be done more simply without using that function. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-22Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski5-26/+32
drivers/net/ethernet/freescale/fec.h 7b15515fc1ca ("Revert "fec: Restart PPS after link state change"") 40c79ce13b03 ("net: fec: add stop mode support for imx8 platform") https://lore.kernel.org/all/20220921105337.62b41047@canb.auug.org.au/ drivers/pinctrl/pinctrl-ocelot.c c297561bc98a ("pinctrl: ocelot: Fix interrupt controller") 181f604b33cd ("pinctrl: ocelot: add ability to be used in a non-mmio configuration") https://lore.kernel.org/all/20220921110032.7cd28114@canb.auug.org.au/ tools/testing/selftests/drivers/net/bonding/Makefile bbb774d921e2 ("net: Add tests for bonding and team address list management") 152e8ec77640 ("selftests/bonding: add a test for bonding lladdr target") https://lore.kernel.org/all/20220921110437.5b7dbd82@canb.auug.org.au/ drivers/net/can/usb/gs_usb.c 5440428b3da6 ("can: gs_usb: gs_can_open(): fix race dev->can.state condition") 45dfa45f52e6 ("can: gs_usb: add RX and TX hardware timestamp support") https://lore.kernel.org/all/84f45a7d-92b6-4dc5-d7a1-072152fab6ff@tessares.net/ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-20net: ipa: properly limit modem routing table useAlex Elder5-26/+32
IPA can route packets between IPA-connected entities. The AP and modem are currently the only such entities supported, and no routing is required to transfer packets between them. The number of entries in each routing table is fixed, and defined at initialization time. Some of these entries are designated for use by the modem, and the rest are available for the AP to use. The AP sends a QMI message to the modem which describes (among other things) information about routing table memory available for the modem to use. Currently the QMI initialization packet gives wrong information in its description of routing tables. What *should* be supplied is the maximum index that the modem can use for the routing table memory located at a given location. The current code instead supplies the total *number* of routing table entries. Furthermore, the modem is granted the entire table, not just the subset it's supposed to use. This patch fixes this. First, the ipa_mem_bounds structure is generalized so its "end" field can be interpreted either as a final byte offset, or a final array index. Second, the IPv4 and IPv6 (non-hashed and hashed) table information fields in the QMI ipa_init_modem_driver_req structure are changed to be ipa_mem_bounds rather than ipa_mem_array structures. Third, we set the "end" value for each routing table to be the last index, rather than setting the "count" to be the number of indices. Finally, instead of allowing the modem to use all of a routing table's memory, it is limited to just the portion meant to be used by the modem. In all versions of IPA currently supported, that is IPA_ROUTE_MODEM_COUNT (8) entries. Update a few comments for clarity. Fixes: 530f9216a9537 ("soc: qcom: ipa: AP/modem communications") Signed-off-by: Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20220913204602.1803004-1-elder@linaro.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-20net: ipa: fix two symbol namesAlex Elder1-2/+2
All field mask symbols are defined with a "_FMASK" suffix, but EOT_COAL_GRANULARITY and DRBIP_ACL_ENABLE are defined without one. Fix that. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-20net: ipa: update sequencer definition constraintsAlex Elder2-3/+14
Starting with IPA v4.5, replication is done differently from before, and as a result the "replication" portion of the how the sequencer is specified must be zero. Add a check for the configuration data failing that requirement, and only update the sesquencer type value when it's supported. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-20net: ipa: don't reuse variable namesAlex Elder1-14/+14
In ipa_endpoint_init_hdr(), as well as ipa_endpoint_init_hdr_ext(), a top-level automatic variable named "offset" is used to represent the offset of a register. However, deeper within each of those functions is *another* definition of a local variable with the same name, representing something else. Scoping rules ensure the result is what was intended, but this variable name reuse is bad practice and makes the code confusing. Fix this by naming the inner variable "off". Use "off" instead of "checksum_offset" in ipa_endpoint_init_cfg() for consistency. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-20net: ipa: move and redefine ipa_version_valid()Alex Elder2-25/+20
Move the definition of ipa_version_valid(), making it a static inline function defined together with the enumerated type in "ipa_version.h". Define a new count value in the type. Rename the function to be ipa_version_supported(), and have it return true only if the IPA version supplied is explicitly supported by the driver. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-20net: ipa: move the definition of gsi_ee_idAlex Elder2-8/+8
Move the definition of the gsi_ee_id enumerated type out of "gsi.h" and into "ipa_version.h". That latter header file isolates the definition of the ipa_version enumerated type, allowing it to be included in both IPA and GSI code. We have the same requirement for gsi_ee_id, and moving it here makes it easier to get only that definition without everything else defined in "gsi.h". Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-20net: ipa: don't define unneeded GSI register offsetsAlex Elder1-156/+52
Each GSI execution environment (EE) is able to access many of the GSI registers associated with the other EEs. A block of GSI registers is contained within a region of memory, and an EE's register offset can be determined by adding the register's base offset to the product of the EE ID and a fixed constant. Despite this possibility, the AP IPA code *never* accesses any GSI registers other than its own. So there's no need to define the macros that compute register offsets for other EEs. Redefine the AP access macros to compute the offset the way the more general "any EE" macro would, and get rid of the unneeded macros. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-09-09net: ipa: don't have gsi_channel_update() return a valueAlex Elder3-10/+11
If it finds no completed transactions, gsi_channel_trans_complete() calls gsi_channel_update() to check hardware. If new transactions have completed, gsi_channel_update() records that, then calls gsi_channel_trans_complete() to return the first of those found. This recursion won't go any further, but can be avoided if we have gsi_channel_update() only be responsible for updating state after accessing hardware. Change gsi_channel_update() so it simply checks for and handles new completions, without returning a value. If it needs to call that function, have gsi_channel_trans_complete() determine whether there are new transactions available after the update. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-09net: ipa: update channel in gsi_channel_trans_complete()Alex Elder3-5/+10
Have gsi_channel_trans_complete() update the known state from hardware rather than doing so in gsi_channel_poll_one(). Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-09net: ipa: kill all other transaction listsAlex Elder3-74/+6
None of the transaction lists are actually needed any more, because transaction IDs (which have been shown to be equivalent) are used instead. So we can remove all of them, as well as the spinlock that protects updates to them. Not requiring a lock simplifies gsi_trans_free() as well; we only need to check the reference count once to decide whether we've hit the last reference. This makes the links field in the gsi_trans structure unused, so get rid of that as well. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-09net: ipa: kill the allocated transaction listAlex Elder2-10/+3
The only place the trans_info->alloc list is used is when initializing it, when adding a transaction to it when allocation finishes, and when moving a transaction from that list to the committed list. We can just skip putting a transaction on the allocated list, and add it (rather than move it) to the committed list when it is committed. On additional caveat is that an allocated transaction that's committed without any TREs added will be immediately freed. Because we aren't adding allocated transactions to a list any more, the list links need to be initialized to ensure they're valid at the time list_del() is called for the transaction. Then we can safely eliminate the allocated transaction list. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-09net: ipa: always use transaction IDs instead of listsAlex Elder2-56/+16
In gsi_channel_trans_complete(), use the completed and pending IDs to determine whether there are any transactions in completed state. Similarly, in gsi_channel_trans_cancel_pending(), use the pending and committed IDs to mark pending transactions cancelled. Rearrange the logic a bit there for a simpler result. This removes the only user of list_last_entry_or_null(), so get rid of that macro. Remove the temporary warnings added by the previous commit. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-05net: ipa: verify a few more IDsAlex Elder1-3/+43
The completed transaction list is used in gsi_channel_trans_complete() to return the next transaction in completed state. Add some temporary checks to verify the transaction indicated by the completed ID matches the one first in this list. Similarly, we use the pending and completed transaction lists when cancelling pending transactions in gsi_channel_trans_cancel_pending(). Add temporary checks there to verify the transactions indicated by IDs match those tracked by these lists. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-05net: ipa: further simplify gsi_channel_trans_last()Alex Elder1-28/+18
Do a little more refactoring in gsi_channel_trans_last() to simplify it further. The resulting code should behave exactly as before. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-05net: ipa: simplify gsi_channel_trans_last()Alex Elder1-26/+7
Using a little logic we can simplify gsi_channel_trans_last(). The first condition in that function looks like this: if (trans_info->allocated_id != trans_info->free_id) And if that's false, we proceed to the next one: if (trans_info->committed_id != trans_info->allocated_id) Failure of the first test implies: trans_info->allocated_id == trans_info->free_id And therefore, the second one can be rewritten this way: if (trans_info->committed_id != trans_info->free_id) Substituting free_id for allocated_id and committed_id can also be done in the code blocks executed when these conditions yield true. The net result is that all three blocks for TX endpoints can be consolidated into just one. The two blocks of code at the end of that function (used for both TX and RX channels) can be similarly consolidated into a single block. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-05net: ipa: use IDs exclusively for last transactionAlex Elder1-15/+27
Always use transaction IDs when finding the "last" transaction to await when quiescing a channel. This basically extends what was done in the previous patch to all other transaction state IDs. As a result we are no longer updating any transaction lists inside gsi_channel_trans_last(), so there's no need to take the spinlock. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-05net: ipa: use IDs for last allocated transactionAlex Elder1-3/+9
Use the allocated and free transaction IDs to determine whether the "last" transaction used for quiescing a channel is in allocated state. The last allocated transaction that has not been committed (if any) immediately precedes the first free transaction in the transaction array. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-05net: ipa: rework last transaction determinationAlex Elder3-36/+28
When quiescing a channel, we find the "last" transaction, which is the latest one to have been allocated. (New transaction allocation will have been prevented by the time this is called.) Currently we do this by looking for the first non-empty transaction list in each state, then return the last entry from that last. Instead, determine the last entry in each list (if any) and return that entry if found. Temporarily (locally) introduce list_last_entry_or_null() as a helper for this, mirroring list_first_entry_or_null(). This macro definition will be removed by an upcoming patch. Remove the temporary warnings added by the previous commit. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-02net: ipa: track polled transactions with an IDAlex Elder2-16/+24
Add a transaction ID to track the first element in the transaction array that has been polled. Advance the ID when we are releasing a transaction. Temporarily add warnings that verify that the first polled transaction tracked by the ID matches the first element on the polled list, both when polling and freeing. Remove the temporary warnings added by the previous commit. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-02net: ipa: track completed transactions with an IDAlex Elder2-17/+24
Add a transaction ID field to track the first element in the transaction array that has completed but has not yet been polled. Advance the ID when we are processing a transaction in the NAPI polling loop (where completed transactions become polled). Temporarily add warnings that verify that the first completed transaction tracked by the ID matches the first element on the completed list, both when pending and completing. Remove the temporary warnings added by the previous commit. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-02net: ipa: track pending transactions with an IDAlex Elder2-18/+29
Add a transaction ID field to track the first element in the transaction array that is pending (sent to hardware) but not yet complete. Advance the ID when a completion event for a channel indicates that transactions have completed. Temporarily add warnings that verify that the first pending transaction tracked by the ID matches the first element on the pending list, both when pending and completing, as well as when resetting the channel. Remove the temporary warnings added by the previous commit. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-02net: ipa: track committed transactions with an IDAlex Elder2-17/+29
Add a transaction ID field to track the first element in a channel's transaction array that has been committed, but not yet passed to the hardware. Advance the ID when the hardware is notified via doorbell that TREs from a transaction are ready for consumption. Temporarily add warnings that verify that the first committed transaction tracked by the ID matches the first element on the committed list, both when committing and pending (at doorbell). Remove the temporary warnings added by the previous commit. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-02net: ipa: track allocated transactions with an IDAlex Elder2-2/+27
Transactions for a channel are now managed in an array, with a free transaction ID indicating which is the next one free. Add another transaction ID field to track the first element in the array that has been allocated. Advance it when a transaction is committed (because that is when that transaction leaves allocated state). Temporarily add warnings that verify that the first allocated transaction tracked by the ID matches the first element on the allocated list, both when allocating and committing a transaction. Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-09-02net: ipa: use an array for transactionsAlex Elder2-13/+20
Transactions are always allocated one at a time. The maximum number of them we could ever need occurs if each TRE is assigned to a transaction. So a channel requires no more transactions than the number of TREs in its transfer ring. That number is known to be a power-of-2 less than 65536. The transaction pool abstraction is used for other things, but for transactions we can use a simple array of transaction structures, and use a free index to indicate which entry in the array is the next one free for allocation. By having the number of elements in the array be a power-of-2, we can use an ever-incrementing 16-bit free index, and use it modulo the array size. Distinguish a "trans_id" (whose value can exceed the number of entries in the transaction array) from a "trans_index" (which is less than the number of entries). Signed-off-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-08-23net: ipa: don't assume SMEM is page-alignedAlex Elder1-1/+1
In ipa_smem_init(), a Qualcomm SMEM region is allocated (if needed) and then its virtual address is fetched using qcom_smem_get(). The physical address associated with that region is also fetched. The physical address is adjusted so that it is page-aligned, and an attempt is made to update the size of the region to compensate for any non-zero adjustment. But that adjustment isn't done properly. The physical address is aligned twice, and as a result the size is never actually adjusted. Fix this by *not* aligning the "addr" local variable, and instead making the "phys" local variable be the adjusted "addr" value. Fixes: a0036bb413d5b ("net: ipa: define SMEM memory region for IPA") Signed-off-by: Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20220818134206.567618-1-elder@linaro.org Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-08-12net: ipa: Fix comment typoJason Wang1-1/+1
The double `is' is duplicated in the comment, remove one. Signed-off-by: Jason Wang <wangborong@cdjrlc.com> Reviewed-by: Alex Elder <elder@linaro.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-07-29Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski1-1/+1
No conflicts. Signed-off-by: Jakub Kicinski <kuba@kernel.org>