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path: root/drivers/pci/controller/pcie-mediatek-gen3.c
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2022-08-23PCI: mediatek-gen3: Change driver name to mtk-pcie-gen3Felix Fietkau1-1/+1
driver_register() will refuse to register another driver with the same name. This change allows pcie-mediatek-gen3 to coexist with pcie-mediatek built into the kernel. Link: https://lore.kernel.org/r/20220505083907.86598-1-nbd@nbd.name Fixes: d3bf75b579b9 ("PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192") Signed-off-by: Felix Fietkau <nbd@nbd.name> Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Reviewed-by: Jianjun Wang <jianjun.wang@mediatek.com>
2022-08-04Merge branch 'pci/ctrl/pm-ops'Bjorn Helgaas1-7/+7
- Convert to new *_PM_OPS macros to avoid need for "#ifdef CONFIG_PM_SLEEP" or "__maybe_unused" (Bjorn Helgaas) * pci/ctrl/pm-ops: PCI: Convert to new *_PM_OPS macros
2022-07-27PCI: Convert to new *_PM_OPS macrosBjorn Helgaas1-7/+7
Replace SET_*_PM_OPS with *_PM_OPS, which which have the advantage that the compiler always sees the PM callbacks as referenced, so they don't need to be wrapped with "#ifdef CONFIG_PM_SLEEP" or tagged with "__maybe_unused" to avoid "defined but not used" warnings. See 1a3c7bb08826 ("PM: core: Add new *_PM_OPS macros, deprecate old ones"). Link: https://lore.kernel.org/r/20220719215108.1583108-1-helgaas@kernel.org Tested-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Pali Rohár <pali@kernel.org> # pci-mvebu.c Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2022-06-15PCI: mediatek-gen3: Print LTSSM state when PCIe link downJianjun Wang1-1/+40
Print current LTSSM state when PCIe link down instead of the register value to make it easier to get the link status. Link: https://lore.kernel.org/r/20220329030715.7975-1-jianjun.wang@mediatek.com Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
2022-06-09PCI: mediatek-gen3: Fix refcount leak in mtk_pcie_init_irq_domains()Miaoqian Lin1-2/+5
of_get_child_by_name() returns a node pointer with refcount incremented, so we should use of_node_put() on it when we don't need it anymore. Add missing of_node_put() to avoid refcount leak. Fixes: 814cceebba9b ("PCI: mediatek-gen3: Add INTx support") Link: https://lore.kernel.org/r/20220601041259.56185-1-linmq006@gmail.com Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Miles Chen <miles.chen@mediatek.com> Acked-by: Jianjun Wang <jianjun.wang@mediatek.com>
2022-05-11PCI: mediatek-gen3: Assert resets to ensure expected init stateAngeloGioacchino Del Regno1-0/+8
The controller may have been left out of reset by the bootloader, in which case, before the powerup sequence, the controller will be found preconfigured with values that were set before booting the kernel: this produces a controller failure, with the result of a failure during the mtk_pcie_startup_port() sequence as the PCIe link never gets up. To ensure that we get a clean start in an expected state, assert both the PHY and MAC resets before executing the controller power-up sequence. Link: https://lore.kernel.org/r/20220404144858.92390-1-angelogioacchino.delregno@collabora.com Fixes: d3bf75b579b9 ("PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192") Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2022-02-18PCI: Add defines for normal and subtractive PCI bridgesPali Rohár1-1/+1
Add these PCI class codes to pci_ids.h: PCI_CLASS_BRIDGE_PCI_NORMAL PCI_CLASS_BRIDGE_PCI_SUBTRACTIVE Use these defines in all kernel code for describing PCI class codes for normal and subtractive PCI bridges. [bhelgaas: similar change in pci-mvebu.c] Link: https://lore.kernel.org/r/20220214114109.26809-1-pali@kernel.org Signed-off-by: Pali Rohár <pali@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2022-01-13Merge branch 'pci/driver-cleanup'Bjorn Helgaas1-188/+188
- Use of_device_get_match_data(), not of_match_device(), when we only need the device data in altera, artpec6, cadence, designware-plat, dra7xx, keystone, kirin (Fan Fei) - Drop pointless of_device_get_match_data() cast in j721e (Bjorn Helgaas) - Drop redundant struct device * from j721e since struct cdns_pcie already has one (Bjorn Helgaas) - Rename driver structs to *_pcie in intel-gw, iproc, ls-gen4, mediatek-gen3, microchip, mt7621, rcar-gen2, tegra194, uniphier, xgene, xilinx, xilinx-cpm for consistency across drivers (Fan Fei) - Fix invalid address space conversions in hisi, spear13xx (Bjorn Helgaas) * pci/driver-cleanup: PCI: spear13xx: Avoid invalid address space conversions PCI: hisi: Avoid invalid address space conversions PCI: xilinx-cpm: Rename xilinx_cpm_pcie_port to xilinx_cpm_pcie PCI: xilinx: Rename xilinx_pcie_port to xilinx_pcie PCI: xgene: Rename xgene_pcie_port to xgene_pcie PCI: uniphier: Rename uniphier_pcie_priv to uniphier_pcie PCI: tegra194: Rename tegra_pcie_dw to tegra194_pcie PCI: rcar-gen2: Rename rcar_pci_priv to rcar_pci PCI: mt7621: Rename mt7621_pci_ to mt7621_pcie_ PCI: microchip: Rename mc_port to mc_pcie PCI: mediatek-gen3: Rename mtk_pcie_port to mtk_gen3_pcie PCI: ls-gen4: Rename ls_pcie_g4 to ls_g4_pcie PCI: iproc: Rename iproc_pcie_pltfm_ to iproc_pltfm_pcie_ PCI: iproc: Rename iproc_pcie_bcma_ to iproc_bcma_pcie_ PCI: intel-gw: Rename intel_pcie_port to intel_pcie PCI: j721e: Drop redundant struct device * PCI: j721e: Drop pointless of_device_get_match_data() cast PCI: kirin: Prefer of_device_get_match_data() PCI: keystone: Prefer of_device_get_match_data() PCI: dra7xx: Prefer of_device_get_match_data() PCI: designware-plat: Prefer of_device_get_match_data() PCI: cadence: Prefer of_device_get_match_data() PCI: artpec6: Prefer of_device_get_match_data() PCI: altera: Prefer of_device_get_match_data() # Conflicts: # drivers/pci/controller/pcie-mt7621.c
2022-01-13Merge branch 'pci/misc'Bjorn Helgaas1-1/+1
- Sort Intel Device IDs by value (Andy Shevchenko) - Change Capability offsets to hex to match spec (Baruch Siach) - Correct misspellings (Krzysztof Wilczyński) - Terminate statement with semicolon in pci_endpoint_test.c (Ming Wang) * pci/misc: misc: pci_endpoint_test: Terminate statement with semicolon PCI: Correct misspelled words PCI: Change capability register offsets to hex PCI: Sort Intel Device IDs by value
2022-01-08PCI: Correct misspelled wordsKrzysztof Wilczyński1-1/+1
Fix a number of misspelled words, and while at it, correct two phrases used to indicate a status of an operation where words used have been cleverly truncated and thus always trigger a spellchecking error while performing a static code analysis over the PCI tree. [bhelgaas: reverse sense of quirk ternary] Link: https://lore.kernel.org/r/20220107225942.121484-1-kw@linux.com Signed-off-by: Krzysztof Wilczyński <kw@linux.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2022-01-04PCI: mediatek-gen3: Rename mtk_pcie_port to mtk_gen3_pcieFan Fei1-186/+186
Rename struct mtk_pcie_port to mtk_gen3_pcie to match the convention of <driver>_pcie. No functional change intended. Link: https://lore.kernel.org/r/20211223011054.1227810-15-helgaas@kernel.org Signed-off-by: Fan Fei <ffclaire1224@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Ryder Lee <ryder.lee@mediatek.com> Cc: Jianjun Wang <jianjun.wang@mediatek.com>
2021-11-29PCI: mediatek-gen3: Disable DVFSRC voltage requestJianjun Wang1-0/+8
When the DVFSRC (dynamic voltage and frequency scaling resource collector) feature is not implemented, the PCIe hardware will assert a voltage request signal when exit from the L1 PM Substates to request a specific Vcore voltage, but cannot receive the voltage ready signal, which will cause the link to fail to exit the L1 PM Substates. Disable DVFSRC voltage request by default, we need to find a common way to enable it in the future. Link: https://lore.kernel.org/r/20211015063602.29058-1-jianjun.wang@mediatek.com Fixes: d3bf75b579b9 ("PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192") Tested-by: Qizhong Cheng <qizhong.cheng@mediatek.com> Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Tzung-Bi Shih <tzungbi@google.com> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-08-02PCI: Bulk conversion to generic_handle_domain_irq()Marc Zyngier1-9/+4
Wherever possible, replace constructs that match either generic_handle_irq(irq_find_mapping()) or generic_handle_irq(irq_linear_revmap()) to a single call to generic_handle_domain_irq(). Link: https://lore.kernel.org/r/20210802162630.2219813-4-maz@kernel.org Signed-off-by: Marc Zyngier <maz@kernel.org> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
2021-06-22PCI: mediatek-gen3: Add missing MODULE_DEVICE_TABLEZou Wei1-0/+1
This patch adds missing MODULE_DEVICE_TABLE definition which generates correct modalias for automatic loading of this driver when it is built as an external module. Link: https://lore.kernel.org/r/1620717091-108691-1-git-send-email-zou_wei@huawei.com Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: Zou Wei <zou_wei@huawei.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
2021-04-29PCI: mediatek-gen3: Add system PM supportJianjun Wang1-0/+113
Add suspend_noirq and resume_noirq callback functions to implement PM system suspend and resume hooks for the MediaTek Gen3 PCIe controller. When the system suspends, trigger the PCIe link to enter the L2 state and pull down the PERST# pin, gating the clocks of the MAC layer, and then power-off the physical layer to provide power-saving. When the system resumes, the PCIe link should be re-established and the related control register values should be restored. Link: https://lore.kernel.org/r/20210420061723.989-7-jianjun.wang@mediatek.com Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
2021-04-29PCI: mediatek-gen3: Add MSI supportJianjun Wang1-0/+276
Add MSI support for MediaTek Gen3 PCIe controller. This PCIe controller supports up to 256 MSI vectors, the MSI hardware block diagram is as follows: +-----+ | GIC | +-----+ ^ | port->irq | +-+-+-+-+-+-+-+-+ |0|1|2|3|4|5|6|7| (PCIe intc) +-+-+-+-+-+-+-+-+ ^ ^ ^ | | ... | +-------+ +------+ +-----------+ | | | +-+-+---+--+--+ +-+-+---+--+--+ +-+-+---+--+--+ |0|1|...|30|31| |0|1|...|30|31| |0|1|...|30|31| (MSI sets) +-+-+---+--+--+ +-+-+---+--+--+ +-+-+---+--+--+ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ | | | | | | | | | | | | (MSI vectors) | | | | | | | | | | | | (MSI SET0) (MSI SET1) ... (MSI SET7) With 256 MSI vectors supported, the MSI vectors are composed of 8 sets, each set has its own address for MSI message, and supports 32 MSI vectors to generate interrupt. Link: https://lore.kernel.org/r/20210420061723.989-6-jianjun.wang@mediatek.com Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
2021-04-29PCI: mediatek-gen3: Add INTx supportJianjun Wang1-0/+172
Add INTx support for MediaTek Gen3 PCIe controller. Link: https://lore.kernel.org/r/20210420061723.989-5-jianjun.wang@mediatek.com Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Marc Zyngier <maz@kernel.org> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
2021-04-29PCI: mediatek-gen3: Add MediaTek Gen3 driver for MT8192Jianjun Wang1-0/+466
MediaTek's PCIe host controller has three generation HWs, the new generation HW is an individual bridge, it supports Gen3 speed and compatible with Gen2, Gen1 speed. Add support for new Gen3 controller which can be found on MT8192. Link: https://lore.kernel.org/r/20210420061723.989-4-jianjun.wang@mediatek.com Signed-off-by: Jianjun Wang <jianjun.wang@mediatek.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Ryder Lee <ryder.lee@mediatek.com>
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