summaryrefslogtreecommitdiff
path: root/drivers/pci
AgeCommit message (Collapse)AuthorFilesLines
2022-08-10Merge tag 'cxl-for-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxlLinus Torvalds4-1/+541
Pull cxl updates from Dan Williams: "Compute Express Link (CXL) updates for 6.0: - Introduce a 'struct cxl_region' object with support for provisioning and assembling persistent memory regions. - Introduce alloc_free_mem_region() to accompany the existing request_free_mem_region() as a method to allocate physical memory capacity out of an existing resource. - Export insert_resource_expand_to_fit() for the CXL subsystem to late-publish CXL platform windows in iomem_resource. - Add a polled mode PCI DOE (Data Object Exchange) driver service and use it in cxl_pci to retrieve the CDAT (Coherent Device Attribute Table)" * tag 'cxl-for-6.0' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl/cxl: (74 commits) cxl/hdm: Fix skip allocations vs multiple pmem allocations cxl/region: Disallow region granularity != window granularity cxl/region: Fix x1 interleave to greater than x1 interleave routing cxl/region: Move HPA setup to cxl_region_attach() cxl/region: Fix decoder interleave programming Documentation: cxl: remove dangling kernel-doc reference cxl/region: describe targets and nr_targets members of cxl_region_params cxl/regions: add padding for cxl_rr_ep_add nested lists cxl/region: Fix IS_ERR() vs NULL check cxl/region: Fix region reference target accounting cxl/region: Fix region commit uninitialized variable warning cxl/region: Fix port setup uninitialized variable warnings cxl/region: Stop initializing interleave granularity cxl/hdm: Fix DPA reservation vs cxl_endpoint_decoder lifetime cxl/acpi: Minimize granularity for x1 interleaves cxl/region: Delete 'region' attribute from root decoders cxl/acpi: Autoload driver for 'cxl_acpi' test devices cxl/region: decrement ->nr_targets on error in cxl_region_attach() cxl/region: prevent underflow in ways_to_cxl() cxl/region: uninitialized variable in alloc_hpa() ...
2022-08-06Merge tag 'dma-mapping-5.20-2022-08-06' of ↵Linus Torvalds2-62/+36
git://git.infradead.org/users/hch/dma-mapping Pull dma-mapping updates from Christoph Hellwig: - convert arm32 to the common dma-direct code (Arnd Bergmann, Robin Murphy, Christoph Hellwig) - restructure the PCIe peer to peer mapping support (Logan Gunthorpe) - allow the IOMMU code to communicate an optional DMA mapping length and use that in scsi and libata (John Garry) - split the global swiotlb lock (Tianyu Lan) - various fixes and cleanup (Chao Gao, Dan Carpenter, Dongli Zhang, Lukas Bulwahn, Robin Murphy) * tag 'dma-mapping-5.20-2022-08-06' of git://git.infradead.org/users/hch/dma-mapping: (45 commits) swiotlb: fix passing local variable to debugfs_create_ulong() dma-mapping: reformat comment to suppress htmldoc warning PCI/P2PDMA: Remove pci_p2pdma_[un]map_sg() RDMA/rw: drop pci_p2pdma_[un]map_sg() RDMA/core: introduce ib_dma_pci_p2p_dma_supported() nvme-pci: convert to using dma_map_sgtable() nvme-pci: check DMA ops when indicating support for PCI P2PDMA iommu/dma: support PCI P2PDMA pages in dma-iommu map_sg iommu: Explicitly skip bus address marked segments in __iommu_map_sg() dma-mapping: add flags to dma_map_ops to indicate PCI P2PDMA support dma-direct: support PCI P2PDMA pages in dma-direct map_sg dma-mapping: allow EREMOTEIO return code for P2PDMA transfers PCI/P2PDMA: Introduce helpers for dma_map_sg implementations PCI/P2PDMA: Attempt to set map_type if it has not been set lib/scatterlist: add flag for indicating P2PDMA segments in an SGL swiotlb: clean up some coding style and minor issues dma-mapping: update comment after dmabounce removal scsi: sd: Add a comment about limiting max_sectors to shost optimal limit ata: libata-scsi: cap ata_device->max_sectors according to shost->max_sectors scsi: scsi_transport_sas: cap shost opt_sectors according to DMA optimal limit ...
2022-08-05Merge tag 'pci-v5.20-changes' of ↵Linus Torvalds57-1735/+2721
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull pci updates from Bjorn Helgaas: "Enumeration: - Consolidate duplicated 'next function' scanning and extend to allow 'isolated functions' on s390, similar to existing hypervisors (Niklas Schnelle) Resource management: - Implement pci_iobar_pfn() for sparc, which allows us to remove the sparc-specific pci_mmap_page_range() and pci_mmap_resource_range(). This removes the ability to map the entire PCI I/O space using /proc/bus/pci, but we believe that's already been broken since v2.6.28 (Arnd Bergmann) - Move common PCI definitions to asm-generic/pci.h and rework others to be be more specific and more encapsulated in arches that need them (Stafford Horne) Power management: - Convert drivers to new *_PM_OPS macros to avoid need for '#ifdef CONFIG_PM_SLEEP' or '__maybe_unused' (Bjorn Helgaas) Virtualization: - Add ACS quirk for Broadcom BCM5750x multifunction NICs that isolate the functions but don't advertise an ACS capability (Pavan Chebbi) Error handling: - Clear PCI Status register during enumeration in case firmware left errors logged (Kai-Heng Feng) - When we have native control of AER, enable error reporting for all devices that support AER. Previously only a few drivers enabled this (Stefan Roese) - Keep AER error reporting enabled for switches. Previously we enabled this during enumeration but immediately disabled it (Stefan Roese) - Iterate over error counters instead of error strings to avoid printing junk in AER sysfs counters (Mohamed Khalfella) ASPM: - Remove pcie_aspm_pm_state_change() so ASPM config changes, e.g., via sysfs, are not lost across power state changes (Kai-Heng Feng) Endpoint framework: - Don't stop an EPC when unbinding an EPF from it (Shunsuke Mie) Endpoint embedded DMA controller driver: - Simplify and clean up support for the DesignWare embedded DMA (eDMA) controller (Frank Li, Serge Semin) Broadcom STB PCIe controller driver: - Avoid config space accesses when link is down because we can't recover from the CPU aborts these cause (Jim Quinlan) - Look for power regulators described under Root Ports in DT and enable them before scanning the secondary bus (Jim Quinlan) - Disable/enable regulators in suspend/resume (Jim Quinlan) Freescale i.MX6 PCIe controller driver: - Simplify and clean up clock and PHY management (Richard Zhu) - Disable/enable regulators in suspend/resume (Richard Zhu) - Set PCIE_DBI_RO_WR_EN before writing DBI registers (Richard Zhu) - Allow speeds faster than Gen2 (Richard Zhu) - Make link being down a non-fatal error so controller probe doesn't fail if there are no Endpoints connected (Richard Zhu) Loongson PCIe controller driver: - Add ACPI and MCFG support for Loongson LS7A (Huacai Chen) - Avoid config reads to non-existent LS2K/LS7A devices because a hardware defect causes machine hangs (Huacai Chen) - Work around LS7A integrated devices that report incorrect Interrupt Pin values (Jianmin Lv) Marvell Aardvark PCIe controller driver: - Add support for AER and Slot capability on emulated bridge (Pali Rohár) MediaTek PCIe controller driver: - Add Airoha EN7532 to DT binding (John Crispin) - Allow building of driver for ARCH_AIROHA (Felix Fietkau) MediaTek PCIe Gen3 controller driver: - Print decoded LTSSM state when the link doesn't come up (Jianjun Wang) NVIDIA Tegra194 PCIe controller driver: - Convert DT binding to json-schema (Vidya Sagar) - Add DT bindings and driver support for Tegra234 Root Port and Endpoint mode (Vidya Sagar) - Fix some Root Port interrupt handling issues (Vidya Sagar) - Set default Max Payload Size to 256 bytes (Vidya Sagar) - Fix Data Link Feature capability programming (Vidya Sagar) - Extend Endpoint mode support to devices beyond Controller-5 (Vidya Sagar) Qualcomm PCIe controller driver: - Rework clock, reset, PHY power-on ordering to avoid hangs and improve consistency (Robert Marko, Christian Marangi) - Move pipe_clk handling to PHY drivers (Dmitry Baryshkov) - Add IPQ60xx support (Selvam Sathappan Periakaruppan) - Allow ASPM L1 and substates for 2.7.0 (Krishna chaitanya chundru) - Add support for more than 32 MSI interrupts (Dmitry Baryshkov) Renesas R-Car PCIe controller driver: - Convert DT binding to json-schema (Herve Codina) - Add Renesas RZ/N1D (R9A06G032) to rcar-gen2 DT binding and driver (Herve Codina) Samsung Exynos PCIe controller driver: - Fix phy-exynos-pcie driver so it follows the 'phy_init() before phy_power_on()' PHY programming model (Marek Szyprowski) Synopsys DesignWare PCIe controller driver: - Simplify and clean up the DWC core extensively (Serge Semin) - Fix an issue with programming the ATU for regions that cross a 4GB boundary (Serge Semin) - Enable the CDM check if 'snps,enable-cdm-check' exists; previously we skipped it if 'num-lanes' was absent (Serge Semin) - Allocate a 32-bit DMA-able page to be MSI target instead of using a driver data structure that may not be addressable with 32-bit address (Will McVicker) - Add DWC core support for more than 32 MSI interrupts (Dmitry Baryshkov) Xilinx Versal CPM PCIe controller driver: - Add DT binding and driver support for Versal CPM5 Gen5 Root Port (Bharat Kumar Gogada)" * tag 'pci-v5.20-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (150 commits) PCI: imx6: Support more than Gen2 speed link mode PCI: imx6: Set PCIE_DBI_RO_WR_EN before writing DBI registers PCI: imx6: Reformat suspend callback to keep symmetric with resume PCI: imx6: Move the imx6_pcie_ltssm_disable() earlier PCI: imx6: Disable clocks in reverse order of enable PCI: imx6: Do not hide PHY driver callbacks and refine the error handling PCI: imx6: Reduce resume time by only starting link if it was up before suspend PCI: imx6: Mark the link down as non-fatal error PCI: imx6: Move regulator enable out of imx6_pcie_deassert_core_reset() PCI: imx6: Turn off regulator when system is in suspend mode PCI: imx6: Call host init function directly in resume PCI: imx6: Disable i.MX6QDL clock when disabling ref clocks PCI: imx6: Propagate .host_init() errors to caller PCI: imx6: Collect clock enables in imx6_pcie_clk_enable() PCI: imx6: Factor out ref clock disable to match enable PCI: imx6: Move imx6_pcie_clk_disable() earlier PCI: imx6: Move imx6_pcie_enable_ref_clk() earlier PCI: imx6: Move PHY management functions together PCI: imx6: Move imx6_pcie_grp_offset(), imx6_pcie_configure_type() earlier PCI: imx6: Convert to NOIRQ_SYSTEM_SLEEP_PM_OPS() ...
2022-08-04Merge branch 'pci/header-cleanup-immutable'Bjorn Helgaas2-1/+5
- Remove pci_get_legacy_ide_irq(); use ATA_PRIMARY_IRQ() and ATA_SECONDARY_IRQ() instead (Stafford Horne) - Remove isa_dma_bridge_buggy, except for x86_32, the only place it's used (Stafford Horne) - Define ARCH_GENERIC_PCI_MMAP_RESOURCE for csky (Stafford Horne) - Move common PCI definitions that arches sometimes override to asm-generic/pci.h (Stafford Horne) - Include <linux/isa-dma.h> for 'isa_dma_bridge_buggy' when needed (bisection hole here) (Randy Dunlap) * pci/header-cleanup-immutable: PCI: Stub __pci_ioport_map() for arches that don't support it at all x86/cyrix: include header linux/isa-dma.h asm-generic: Add new pci.h and use it csky: PCI: Define ARCH_GENERIC_PCI_MMAP_RESOURCE PCI: Move isa_dma_bridge_buggy out of asm/dma.h PCI: Remove pci_get_legacy_ide_irq() and asm-generic/pci.h
2022-08-04Merge branch 'pci/misc'Bjorn Helgaas5-6/+7
- Drop of_match_ptr() to avoid unused variables when CONFIG_OF is unset (Bjorn Helgaas) - Fix ARM pci_remap_iospace() when CONFIG_MMU unset to avoid build errors (Pali Rohár) * pci/misc: PCI/ACPI: Update link to PCI firmware specification PCI: Drop of_match_ptr() to avoid unused variables
2022-08-04Merge branch 'pci/ctrl/pm-ops'Bjorn Helgaas10-42/+35
- Convert to new *_PM_OPS macros to avoid need for "#ifdef CONFIG_PM_SLEEP" or "__maybe_unused" (Bjorn Helgaas) * pci/ctrl/pm-ops: PCI: Convert to new *_PM_OPS macros
2022-08-04Merge branch 'pci/ctrl/xilinx-cpm'Bjorn Helgaas1-2/+58
- Add DT binding and driver support for Versal CPM5 Gen5 Root Port (Bharat Kumar Gogada) * pci/ctrl/xilinx-cpm: MAINTAINERS: Add Xilinx Versal CPM Root Port maintainers PCI: xilinx-cpm: Add support for Versal CPM5 Root Port dt-bindings: PCI: xilinx-cpm: Add Versal CPM5 Root Port
2022-08-04Merge branch 'pci/ctrl/vmd'Bjorn Helgaas1-3/+10
- Use devm_kasprintf() instead of simple kasprintf() (Subramanian Mohan) - Add [8086:7D0B] and [8086:AD0B] devices to VMD driver (Francisco Munoz) * pci/ctrl/vmd: PCI: vmd: Add DID 8086:7D0B and 8086:AD0B for Intel MTL SKUs PCI: vmd: Use devm_kasprintf() instead of simple kasprintf()
2022-08-04Merge branch 'pci/ctrl/tegra194'Bjorn Helgaas3-238/+468
- Fix tegra_pcie_config_ep() power management in error path (Miaoqian Lin) - Convert DT binding to json-schema (Vidya Sagar) - Add DT bindings and driver support for Tegra234 Root Port and Endpoint mode (Vidya Sagar) - Disable MSI for Tegra234 Root Ports so they use INTx for all events (PCIe doesn't allow mixing INTx and MSI/MSI-X) (Vidya Sagar) - Search for Vendor-Specific RAS-DEC capability instead of hard-coding offset (Vidya Sagar) - Fix unintentional APPL_INTR_STATUS_L0 value overwrite in Root Port interrupt handling (Vidya Sagar) - Clear Bandwidth Management interrupt status bit to avoid interrupt storm (Vidya Sagar) - Set default Max Payload Size to 256 bytes (Vidya Sagar) - Fix offset when clearing bit in Data Link Feature capability (Vidya Sagar) - Extend Endpoint mode support to devices beyond Controller-5 (Vidya Sagar) * pci/ctrl/tegra194: PCI: tegra194: Add Tegra234 PCIe support PCI: tegra194: Extend Endpoint mode support PCI: tegra194: Fix link up retry sequence PCI: tegra194: Clean up the exit path for Endpoint mode PCI: tegra194: Enable support for 256 Byte payload PCI: tegra194: Clear bandwidth management status PCI: tegra194: Fix Root Port interrupt handling PCI: tegra194: Find RAS DES PCIe capability offset Revert "PCI: tegra194: Rename tegra_pcie_dw to tegra194_pcie" PCI: Disable MSI for Tegra234 Root Ports dt-bindings: PCI: tegra234: Add schema for tegra234 Endpoint mode dt-bindings: PCI: tegra234: Add schema for tegra234 Root Port mode dt-bindings: PCI: tegra194: Convert to json-schema PCI: tegra194: Fix PM error handling in tegra_pcie_config_ep() # Conflicts: # drivers/pci/controller/dwc/pcie-designware.h # drivers/pci/controller/dwc/pcie-tegra194.c
2022-08-04Merge branch 'pci/ctrl/switchtec'Bjorn Helgaas1-4/+3
- Prefer ida_alloc()/free() over ida_simple_get()/remove() (Ke Liu) * pci/ctrl/switchtec: PCI: switchtec: Prefer ida_alloc()/free() over ida_simple_get()/remove()
2022-08-04Merge branch 'pci/ctrl/rcar-gen2'Bjorn Helgaas1-0/+1
- Convert DT binding to json-schema (Herve Codina) - Add Renesas RZ/N1D (R9A06G032) to rcar-gen2 DT binding (Herve Codina) - Add Renesas RZ/N1D compatible string ("renesas,pci-rzn1") to rcar-gen2 driver (Herve Codina) * pci/ctrl/rcar-gen2: PCI: rcar-gen2: Add RZ/N1 SOC family compatible string dt-bindings: PCI: renesas,pci-rcar-gen2: Add device tree support for R9A06G032 dt-bindings: PCI: pci-rcar-gen2: Convert bindings to json-schema
2022-08-04Merge branch 'pci/ctrl/qcom'Bjorn Helgaas3-164/+276
- Add PHY clock source implementation (Dmitry Baryshkov) - Use new clk_regmap_phy_mux_ops for gcc-sm8450 and gcc-sc7280 PCIe pipe clocks (Dmitry Baryshkov) - Set up rev 2.1.0 PARF_PHY before enabling clocks (Christian Marangi) - Power on PHY before accessing IPQ8074 DBI registers to avoid boot hangs (Robert Marko) - Power on PHY before accessing DBI registers on all variants for consistency (Robert Marko) - Remove unnecessary pipe_clk handling since this is done in PHY drivers (Dmitry Baryshkov) - Drop manual pipe_clk_src handling (Dmitry Baryshkov) - Move GEN3_RELATED DBI definitions to common dwc header (Baruch Siach) - Define slot capabilities using generic PCI_EXP_SLTCAP_* macros (Baruch Siach) - Add IPQ60xx support (Selvam Sathappan Periakaruppan) - Fix DT description typo (Baruch Siach) - Fix DT "compatibles" typo (Johan Hovold) - Allow ASPM L1 and substates for 2.7.0 (Krishna chaitanya chundru) * pci/ctrl/qcom: PCI: qcom: Allow ASPM L1 and substates for 2.7.0 dt-bindings: PCI: qcom: Fix reset conditional dt-bindings: PCI: qcom: Fix description typo PCI: qcom: Add IPQ60xx support PCI: qcom: Define slot capabilities using PCI_EXP_SLTCAP_* PCI: dwc: Move GEN3_RELATED DBI definitions to common header PCI: qcom: Drop manual pipe_clk_src handling PCI: qcom: Remove unnecessary pipe_clk handling PCI: qcom: Power on PHY before DBI register accesses PCI: qcom: Power on PHY before IPQ8074 DBI register accesses PCI: qcom: Set up rev 2.1.0 PARF_PHY before enabling clocks clk: qcom: gcc-sc7280: use new clk_regmap_phy_mux_ops for PCIe pipe clocks clk: qcom: gcc-sm8450: use new clk_regmap_phy_mux_ops for PCIe pipe clocks clk: qcom: regmap: add PHY clock source implementation
2022-08-04Merge branch 'pci/ctrl/microchip'Bjorn Helgaas1-0/+2
- Fix refcount leak in mc_pcie_init_irq_domains() (Miaoqian Lin) * pci/ctrl/microchip: PCI: microchip: Fix refcount leak in mc_pcie_init_irq_domains()
2022-08-04Merge branch 'pci/ctrl/mediatek-gen3'Bjorn Helgaas1-3/+45
- Fix refcount leak in mtk_pcie_init_irq_domains() (Miaoqian Lin) - Print decoded LTSSM state when the link doesn't come up (Jianjun Wang) * pci/ctrl/mediatek-gen3: PCI: mediatek-gen3: Print LTSSM state when PCIe link down PCI: mediatek-gen3: Fix refcount leak in mtk_pcie_init_irq_domains()
2022-08-04Merge branch 'pci/ctrl/mediatek'Bjorn Helgaas1-1/+1
- Add Airoha EN7532 to DT binding (John Crispin) - Allow building of mediatek driver for ARCH_AIROHA (Felix Fietkau) * pci/ctrl/mediatek: PCI: mediatek: Allow building for ARCH_AIROHA dt-bindings: PCI: mediatek: Add Airoha EN7532 support
2022-08-04Merge branch 'pci/ctrl/loongson'Bjorn Helgaas2-41/+167
- Wrap ARM64-specific MCFG quirks in #ifdef so Loongson can use the file (Huacai Chen) - Use generic (not 32-bit only) config accesses for LS2K/LS7A (Huacai Chen) - Add ACPI and MCFG support for Loongson LS7A (Huacai Chen) - Avoid config reads to non-existent LS2K/LS7A devices because a hardware defect causes machine hangs (Huacai Chen) - Work around LS7A integrated devices that report incorrect Interrupt Pin values (Jianmin Lv) * pci/ctrl/loongson: PCI: loongson: Work around LS7A incorrect Interrupt Pin registers PCI: loongson: Don't access non-existent devices PCI: loongson: Add ACPI init support PCI: loongson: Use generic 8/16/32-bit config ops on LS2K/LS7A PCI/ACPI: Guard ARM64-specific mcfg_quirks
2022-08-04Merge branch 'pci/ctrl/iproc'Bjorn Helgaas1-2/+2
- Use bitmap API to allocate bitmaps instead of doing it by hand (Christophe JAILLET) * pci/ctrl/iproc: PCI: iproc: Use bitmap API to allocate bitmaps
2022-08-04Merge branch 'pci/ctrl/imx6'Bjorn Helgaas1-304/+360
- Factor out ref clock disables to match enables (Bjorn Helgaas) - Collect clock enables in imx6_pcie_clk_enable() (Richard Zhu) - Propagate regulator and clock errors back to .host_init() caller (Richard Zhu) - Disable i.MX6QDL clock when disabling ref clocks (Richard Zhu) - Call host init function directly in resume instead of duplicating the code (Richard Zhu) - Turn off regulators when suspending (Richard Zhu) - Make link being down a non-fatal error so probe doesn't fail (Richard Zhu) - Start link in resume only if it was up before suspend to reduce resume time (Richard Zhu) - Move PHY init and power-on out of clock- and reset-related functions (Richard Zhu) - Rework suspend callback to be more symmetric with resume (Richard Zhu) - Set PCIE_DBI_RO_WR_EN before writing DBI registers (Richard Zhu) - Allow speeds faster than Gen2 (Richard Zhu) * pci/ctrl/imx6: PCI: imx6: Support more than Gen2 speed link mode PCI: imx6: Set PCIE_DBI_RO_WR_EN before writing DBI registers PCI: imx6: Reformat suspend callback to keep symmetric with resume PCI: imx6: Move the imx6_pcie_ltssm_disable() earlier PCI: imx6: Disable clocks in reverse order of enable PCI: imx6: Do not hide PHY driver callbacks and refine the error handling PCI: imx6: Reduce resume time by only starting link if it was up before suspend PCI: imx6: Mark the link down as non-fatal error PCI: imx6: Move regulator enable out of imx6_pcie_deassert_core_reset() PCI: imx6: Turn off regulator when system is in suspend mode PCI: imx6: Call host init function directly in resume PCI: imx6: Disable i.MX6QDL clock when disabling ref clocks PCI: imx6: Propagate .host_init() errors to caller PCI: imx6: Collect clock enables in imx6_pcie_clk_enable() PCI: imx6: Factor out ref clock disable to match enable PCI: imx6: Move imx6_pcie_clk_disable() earlier PCI: imx6: Move imx6_pcie_enable_ref_clk() earlier PCI: imx6: Move PHY management functions together PCI: imx6: Move imx6_pcie_grp_offset(), imx6_pcie_configure_type() earlier PCI: imx6: Convert to NOIRQ_SYSTEM_SLEEP_PM_OPS()
2022-08-04Merge branch 'pci/ctrl/fu740'Bjorn Helgaas1-2/+0
- Remove unnecessary include files (Bjorn Helgaas) * pci/ctrl/fu740: PCI: fu740: Remove unnecessary include files
2022-08-04Merge branch 'pci/ctrl/exynos'Bjorn Helgaas1-2/+1
- Move samsung phy-exynos-pcie init all to exynos5433_pcie_phy_init() instead of splitting across phy_init() and phy_power_on() (Marek Szyprowski) - Call phy_init() before phy_power_on() for samsung phy-exynos-pcie, as required by the PHY programming model (Marek Szyprowski) * pci/ctrl/exynos: PCI: exynos: Correct generic PHY usage phy: samsung: phy-exynos-pcie: sanitize init/power_on callbacks
2022-08-04Merge branch 'pci/ctrl/dwc-edma'Bjorn Helgaas1-10/+106
- Remove unused struct dw_edma_chip.irq (Frank Li) - Move eDMA private data from struct dw_edma to struct dw_edma_chip (Frank Li) - Convert "struct dw_edma_region rg_region" to "void __iomem *reg_base" since only the virtual address (not physical address or size) is used (Frank Li) - Rename "*_ch_cnt" to "ll_*_cnt" to reflect actual usage (Frank Li) - Drop dma_slave_config.direction field usage (Serge Semin) - Fix eDMA Rd/Wr-channels and DMA-direction semantics (Serge Semin) - Add chip-specific DW_EDMA_CHIP_LOCAL flag to indicate that local eDMA doesn't require generating MSIs to remote (Frank Li) - Enable DMA tests for endpoints that support it (Frank Li) * pci/ctrl/dwc-edma: PCI: endpoint: Enable DMA tests for endpoints with DMA capabilities dmaengine: dw-edma: Add support for chip-specific flags dmaengine: dw-edma: Fix eDMA Rd/Wr-channels and DMA-direction semantics dmaengine: dw-edma: Drop dma_slave_config.direction field usage dmaengine: dw-edma: Rename wr(rd)_ch_cnt to ll_wr(rd)_cnt in struct dw_edma_chip dmaengine: dw-edma: Change rg_region to reg_base in struct dw_edma_chip dmaengine: dw-edma: Detach the private data and chip info structures dmaengine: dw-edma: Remove unused irq field in struct dw_edma_chip
2022-08-04Merge branch 'pci/ctrl/dwc'Bjorn Helgaas27-642/+708
- Stop link on host_init errors and de-initialization (Serge Semin) - Add support for unrolled iATU register space in dw_pcie_disable_atu() (Serge Semin) - Disable outbound windows only for controllers that use iATU (Serge Semin) - Set INCREASE_REGION_SIZE flag based on limit address, not on the size, since even a small size may cross a 4GB boundary (Serge Semin) - Deallocate EPC memory on dw_pcie_ep_init() errors to avoid a leak (Serge Semin) - Always enable CDM check if "snps,enable-cdm-check" exists instead of exiting early if the optional "num-lanes" was absent (Serge Semin) - Simplify detection of whether we're using unrolled iATU registers (Serge Semin) - Make dw_pcie_link_up() more generic by using dw_pcie_readl_dbi() instead of readl() (Serge Semin) - Add dw_pcie_start_link() and dw_pcie_stop_link() wrappers to factor out checks for ops being implemented (Serge Semin) - Move io_cfg_atu_shared to struct pcie_port and rename to cfg0_io_shared, since it's not used by dwc common code or dwc endpoint code (Serge Semin) - Rename struct pcie_port to dw_pcie_rp to indicate that it's DesignWare-specific (Serge Semin) - Drop unused struct dw_plat_pcie regmap pointer (Serge Semin) - Fix some coding style issues (Serge Semin) - Log link speed and width if it comes up (Serge Semin) - Save DWC IP core version in native format as read from PORT_LOGIC.PCIE_VERSION_OFF register (Serge Semin) - Read DWC IP core version from PORT_LOGIC.PCIE_VERSION_OFF (Serge Semin) - Add macros to compare Synopsys IP core versions (Serge Semin) - Drop manual DWC IP core version setup from intel-gw and tegra194 (Serge Semin) - Add dw_pcie_ops.host_deinit() callback (Serge Semin) - Drop enum dw_pcie_as_type in favor of PCIE_ATU_TYPE_MEM/IO (Serge Semin) - Drop enum dw_pcie_region_type in favor of PCIE_ATU_REGION_DIR_IB/OB (Serge Semin) - Simplify in/outbound iATU setup methods and reduce duplicated code (Serge Semin) - Detect iATU region size from hardware (Serge Semin) - Validate iATU outbound mappings against hardware constraints (Serge Semin) - Check for errors in iATU setup (Serge Semin) - Allocate a 32-bit DMA-able page to be MSI target instead of using a driver data structure that may not be addressable with 32-bit address (Will McVicker) - Use the bitmap API to allocate bitmaps instead of open-coding it (Christophe JAILLET) - Correct dw_pcie_free_msi() checking for when to remove IRQ handler and data (Dmitry Baryshkov) - Split MSI init to new dw_pcie_msi_host_init() function (Dmitry Baryshkov) - Convert struct pcie_port.msi_irq to an array so we can support more than 32 MSI interrupts (Dmitry Baryshkov) - Handle MSIs routed to multiple GIC interrupts for Qualcomm platforms with groups of 32 MSI vectors (Dmitry Baryshkov) - Add additional MSI interrupts to qcom DT (Dmitry Baryshkov) * pci/ctrl/dwc: dt-bindings: PCI: qcom: Support additional MSI vectors PCI: dwc: Handle MSIs routed to multiple GIC interrupts PCI: dwc: Convert struct pcie_port.msi_irq to an array PCI: dwc: Split MSI IRQ parsing/allocation to a separate function PCI: dwc: Correct msi_irq condition in dw_pcie_free_msi() PCI: dwc: Use the bitmap API to allocate bitmaps PCI: dwc: Fix MSI msi_msg DMA mapping PCI: dwc: Check iATU in/outbound range setup status PCI: dwc: Validate iATU outbound mappings against hardware constraints PCI: dwc: Add iATU regions size detection procedure PCI: dwc: Simplify in/outbound iATU setup methods PCI: dwc: Drop enum dw_pcie_region_type in favor of PCIE_ATU_REGION_DIR_IB/OB PCI: dwc: Drop enum dw_pcie_as_type in favor of PCIE_ATU_TYPE_MEM/IO PCI: dwc: Add dw_pcie_ops.host_deinit() callback PCI: tegra194: Drop manual DW PCIe controller version setup PCI: intel-gw: Drop manual DW PCIe controller version setup PCI: dwc: Add macros to compare Synopsys IP core versions PCI: dwc: Read DWC IP core version from register PCI: dwc: Use native DWC IP core version representation PCI: dwc: Detect iATU settings after getting "addr_space" resource PCI: dwc: Log link speed and width if it comes up PCI: dwc-plat: Drop dw_plat_pcie_of_match[] forward declaration PCI: dwc-plat: Drop unused regmap pointer PCI: dwc-plat: Simplify dw_plat_pcie_probe() return values PCI: dwc: Rename struct pcie_port to dw_pcie_rp PCI: dwc: Move io_cfg_atu_shared to struct pcie_port PCI: dwc: Add start_link/stop_link inlines PCI: dwc: Reuse local pointer to the resource data PCI: dwc: Organize local variable usage PCI: dwc: Convert dw_pcie_link_up() to use dw_pcie_readl_dbi() PCI: dwc: Simplify unrolled iATU detection PCI: dwc: Add newlines to log messages PCI: dwc: Add braces to multi-line if-else statements PCI: dwc: Always enable CDM check if "snps,enable-cdm-check" exists PCI: dwc: Deallocate EPC memory on dw_pcie_ep_init() errors PCI: dwc: Set INCREASE_REGION_SIZE flag based on limit address PCI: dwc: Disable outbound windows only for controllers using iATU PCI: dwc: Add unroll iATU space support to dw_pcie_disable_atu() PCI: dwc: Stop link on host_init errors and de-initialization
2022-08-04Merge branch 'pci/ctrl/brcmstb'Bjorn Helgaas1-138/+305
- Remove unnecessary forward declarations (Jim Quinlan) - Prevent config space access when link is down (Jim Quinlan) - Split post-link up initialization to brcm_pcie_start_link() (Jim Quinlan) - Enable child bus device regulators described under Root Ports in DT (Jim Quinlan) - Disable/enable regulators in suspend/resume (Jim Quinlan) - Rename .map_bus() functions to end with 'map_bus' as they do in other drivers (Jim Quinlan) * pci/ctrl/brcmstb: PCI: brcmstb: Rename .map_bus() functions to end with 'map_bus' PCI: brcmstb: Disable/enable regulators in suspend/resume PCI: brcmstb: Enable child bus device regulators from DT PCI: brcmstb: Split post-link up initialization to brcm_pcie_start_link() PCI: brcmstb: Prevent config space access when link is down PCI: brcmstb: Remove unnecessary forward declarations
2022-08-04Merge branch 'pci/ctrl/aardvark'Bjorn Helgaas1-9/+103
- Add support for AER capability on emulated bridge (Pali Rohár) - Add support for Slot capability on emulated bridge (Pali Rohár) * pci/ctrl/aardvark: PCI: aardvark: Fix reporting Slot capabilities on emulated bridge PCI: aardvark: Add support for AER registers on emulated bridge
2022-08-04Merge branch 'pci/virtualization'Bjorn Helgaas1-0/+3
- Add ACS quirk for Broadcom BCM5750x multifunction NICs that isolate the functions but don't advertise an ACS capability (Pavan Chebbi) * pci/virtualization: PCI: Add ACS quirk for Broadcom BCM5750x NICs
2022-08-04Merge branch 'pci/resource'Bjorn Helgaas2-45/+6
- Replace sparc pci_mmap_page_range() wrapper. This still leaves a sparc-specific pci_mmap_resource_range(), but it's only one interface instead of two (Arnd Bergmann) - Remove sparc-specific pci_mmap_resource_range() by implementing pci_iobar_pfn(). This removes the ability to map the entire PCI I/O space using /proc/bus/pci, but we believe that's already been broken since v2.6.28 (Arnd Bergmann) * pci/resource: sparc: Use generic pci_mmap_resource_range() PCI: Remove pci_mmap_page_range() wrapper
2022-08-04Merge branch 'pci/err'Bjorn Helgaas4-16/+23
- Recognize disconnected devices so we don't bother trying to set them to "frozen" or "normal" state (Christoph Hellwig) - Clear PCI Status register during enumeration in case firmware left errors logged (Kai-Heng Feng) - Configure ECRC for every device, including hot-added ones (Stefan Roese) - Keep AER error reporting enabled for switches (Stefan Roese) - Enable error reporting for all devices that support AER (Stefan Roese) - Iterate over error counters instead of error strings to avoid printing junk in AER sysfs counters (Mohamed Khalfella) * pci/err: PCI/AER: Iterate over error counters instead of error strings PCI/AER: Enable error reporting when AER is native PCI/portdrv: Don't disable AER reporting in get_port_device_capability() PCI/AER: Configure ECRC for every device PCI: Clear PCI_STATUS when setting up device PCI/ERR: Recognize disconnected devices in report_error_detected()
2022-08-04Merge branch 'pci/enumeration'Bjorn Helgaas1-46/+41
- Split out ARI "next function" handling from the traditional one (Niklas Schnelle) - Move jailhouse "isolated function" (non-zero functions where function 0 doesn't exist) handling to pci_scan_slot() to avoid duplicating multi-function scanning in pci_scan_child_bus_extend() (Niklas Schnelle) - Extend "isolated function" probing to s390 (Niklas Schnelle). - Allow s390 zPCI zbus without a function 0 (Niklas Schnelle) * pci/enumeration: s390/pci: allow zPCI zbus without a function zero PCI: Extend isolated function probing to s390 PCI: Move jailhouse's isolated function handling to pci_scan_slot() PCI: Split out next_ari_fn() from next_fn() PCI: Clean up pci_scan_slot()
2022-08-04Merge branch 'pci/endpoint'Bjorn Helgaas1-1/+0
- Don't stop an EPC when unbinding an EPF from it (Shunsuke Mie) * pci/endpoint: PCI: endpoint: Don't stop controller when unbinding endpoint function
2022-08-01PCI: imx6: Support more than Gen2 speed link modeRichard Zhu1-4/+4
Support more than Gen2 speed link mode, since i.MX8MP PCIe supports up to Gen3 link speed. Link: https://lore.kernel.org/r/1658287576-26908-1-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2022-08-01PCI: imx6: Set PCIE_DBI_RO_WR_EN before writing DBI registersRichard Zhu1-0/+4
The PCIE_DBI_RO_WR_EN bit should be set when write some DBI registers. To make sure that the DBI registers are writable, set the PCIE_DBI_RO_WR_EN properly when writing the DBI registers. Link: https://lore.kernel.org/r/1652866528-13220-1-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2022-08-01PCI: imx6: Reformat suspend callback to keep symmetric with resumeRichard Zhu1-25/+37
Create imx6_pcie_stop_link() and imx6_pcie_host_exit() functions. Encapsulate clocks, regulators disables and PHY uninitialization into imx6_pcie_host_exit(). To keep suspend/resume symmetric as much as possible, invoke these two new created functions in suspend callback. To be symmetric with imx6_pcie_host_exit(), move imx6_pcie_clk_enable() to imx6_pcie_host_init() from imx6_pcie_deassert_core_reset(). Link: https://lore.kernel.org/r/1657783869-19194-18-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
2022-08-01PCI: imx6: Move the imx6_pcie_ltssm_disable() earlierRichard Zhu1-19/+19
Move the imx6_pcie_ltssm_disable() earlier and place it just behind the imx6_pcie_ltssm_enable(), since it might not be only used by suspend callback directly. To be symmetric with imx6_pcie_ltssm_enable(), add the IMX6Q and IMX8MQ switch cases in imx6_pcie_ltssm_disable(). Link: https://lore.kernel.org/r/1657783869-19194-17-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2022-08-01PCI: imx6: Disable clocks in reverse order of enableBjorn Helgaas1-2/+2
imx6_pcie_clk_enable() enables clocks in the order: pcie_phy pcie_bus pcie imx6_pcie_enable_ref_clk Change imx6_pcie_clk_disable() to disable them in the reverse order. Link: https://lore.kernel.org/r/1657783869-19194-16-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Richard Zhu <hongxing.zhu@nxp.com>
2022-08-01PCI: imx6: Do not hide PHY driver callbacks and refine the error handlingRichard Zhu1-13/+23
Move the phy_power_on() to host_init from imx6_pcie_clk_enable(). Move the phy_init() to host_init from imx6_pcie_deassert_core_reset(). Refine the error handling in imx6_pcie_host_init() accordingly. Link: https://lore.kernel.org/r/1657783869-19194-15-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2022-08-01PCI: imx6: Reduce resume time by only starting link if it was up before suspendRichard Zhu1-1/+6
i.MX PCIe doesn't support hotplug. During resume, only start PCIe link training when the link was up before system suspend to avoid the long latency in the link training period. Link: https://lore.kernel.org/r/1657783869-19194-14-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2022-08-01PCI: imx6: Mark the link down as non-fatal errorRichard Zhu1-7/+8
If the PCIe link is down, return zero from imx6_pcie_start_link() so the driver will probe successfully. Link: https://lore.kernel.org/r/1657783869-19194-13-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
2022-08-01PCI: imx6: Move regulator enable out of imx6_pcie_deassert_core_reset()Richard Zhu1-20/+16
Move regulator enable out of imx6_pcie_deassert_core_reset(), since the regulator_enable() has nothing to do with imx6_pcie_deassert_core_reset(). Link: https://lore.kernel.org/r/1657783869-19194-12-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2022-08-01PCI: imx6: Turn off regulator when system is in suspend modeRichard Zhu1-12/+5
The driver should undo any enables it did itself. The regulator disable shouldn't be basing decisions on regulator_is_enabled(). Move the regulator_disable to the suspend function, turn off regulator when the system is in suspend mode. Link: https://lore.kernel.org/r/1657783869-19194-11-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2022-08-01PCI: imx6: Call host init function directly in resumeRichard Zhu1-3/+3
Call imx6_pcie_host_init() instead of duplicating codes in resume. Note that this also means we do MPLL setup again during resume, which we didn't do before. [bhelgaas: add MPLL setup note, pointed out by Lucas] Link: https://lore.kernel.org/r/1657783869-19194-10-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
2022-08-01PCI: imx6: Disable i.MX6QDL clock when disabling ref clocksRichard Zhu1-0/+8
When disabling PCIe clocks, disable i.MX6QDL ref clock too. Link: https://lore.kernel.org/r/1657783869-19194-9-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
2022-08-01PCI: imx6: Propagate .host_init() errors to callerRichard Zhu1-4/+12
Since dw_pcie_host_init() checks for errors from ops->host_init(), check for errors when enabling power regulators and clocks and return them. [bhelgaas: commit log] Link: https://lore.kernel.org/r/1657783869-19194-8-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
2022-08-01PCI: imx6: Collect clock enables in imx6_pcie_clk_enable()Richard Zhu1-39/+56
Encapsulate the i.MX PCIe clock enable operations into one standalone function, imx6_pcie_clk_enable(). No functional change intended. [bhelgaas: split pure code moves into separate patches] Link: https://lore.kernel.org/r/1657783869-19194-7-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
2022-08-01PCI: imx6: Factor out ref clock disable to match enableBjorn Helgaas1-6/+10
The PCIe ref clocks are specific to different variants. The enables are already split out into imx6_pcie_enable_ref_clk(), but the disables were combined with the more generic bus/phy/pcie clock disables in imx6_pcie_clk_disable(). Split out the variant-specific disables into imx6_pcie_disable_ref_clk() to match imx6_pcie_enable_ref_clk(). No functional change intended. Link: https://lore.kernel.org/r/1657783869-19194-6-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Richard Zhu <hongxing.zhu@nxp.com>
2022-08-01PCI: imx6: Move imx6_pcie_clk_disable() earlierRichard Zhu1-24/+24
Move imx6_pcie_clk_disable() earlier to be near other clock-related functions. No functional change intended. [bhelgaas: reorder patch so pure moves are earlier] Link: https://lore.kernel.org/r/1657783869-19194-5-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de>
2022-08-01PCI: imx6: Move imx6_pcie_enable_ref_clk() earlierBjorn Helgaas1-48/+48
Move imx6_pcie_enable_ref_clk() earlier so it's not in the middle between imx6_pcie_assert_core_reset() and imx6_pcie_deassert_core_reset(). No functional change intended. Link: https://lore.kernel.org/r/1657783869-19194-4-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Richard Zhu <hongxing.zhu@nxp.com>
2022-08-01PCI: imx6: Move PHY management functions togetherBjorn Helgaas1-128/+128
Collect imx6_pcie_init_phy(), imx7d_pcie_wait_for_phy_pll_lock(), and imx6_setup_phy_mpll() earlier with other PHY-related code. No functional change intended. Link: https://lore.kernel.org/r/1657783869-19194-3-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Richard Zhu <hongxing.zhu@nxp.com>
2022-08-01PCI: imx6: Move imx6_pcie_grp_offset(), imx6_pcie_configure_type() earlierBjorn Helgaas1-25/+25
Move imx6_pcie_grp_offset() and imx6_pcie_configure_type() earlier in the file since they depend on nothing and are used by several other functions that will be moved earlier. No functional change intended. Link: https://lore.kernel.org/r/1657783869-19194-2-git-send-email-hongxing.zhu@nxp.com Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Acked-by: Richard Zhu <hongxing.zhu@nxp.com>
2022-08-01PCI: imx6: Convert to NOIRQ_SYSTEM_SLEEP_PM_OPS()Bjorn Helgaas1-4/+2
Replace SET_NOIRQ_SYSTEM_SLEEP_PM_OPS() with NOIRQ_SYSTEM_SLEEP_PM_OPS(), which has the advantage that the compiler always sees the PM callbacks as referenced, so they don't need to be wrapped with "#ifdef CONFIG_PM_SLEEP" or tagged with "__maybe_unused" to avoid "defined but not used" warnings. See 1a3c7bb08826 ("PM: core: Add new *_PM_OPS macros, deprecate old ones"). Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
2022-08-01PCI: exynos: Correct generic PHY usageMarek Szyprowski1-2/+1
The proper initialization for generic PHYs is to call first phy_init(), then phy_power_on(). While touching this, remove the phy_reset() call. It is just a left-over from the obsoleted Exynos5440 support and the current exynos-pcie PHY driver doesn't even support this function. It is also rarely used by other drivers. Link: https://lore.kernel.org/r/20220628220409.26545-2-m.szyprowski@samsung.com Reported-by: Bjorn Helgaas <helgaas@kernel.org> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Chanho Park <chanho61.park@samsung.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
generated by cgit v1.2.3 (git 2.39.0) at 2024-09-08 20:20:10 +0300