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2023-10-26Merge branches 'acpi-video', 'acpi-prm', 'acpi-apei' and 'acpi-pcc'Rafael J. Wysocki1-0/+10
Merge ACPI backlight driver updates, ACPI APEI updates, ACPI PRM updates and changes related to ACPI PCC for 6.7-rc1: - Add acpi_backlight=vendor quirk for Toshiba Portégé R100 (Ondrej Zary). - Add "vendor" backlight quirks for 3 Lenovo x86 Android tablets (Hans de Goede). - Move Xiaomi Mi Pad 2 backlight quirk to its own section (Hans de Goede). - Annotate struct prm_module_info with __counted_by (Kees Cook). - Fix AER info corruption in aer_recover_queue() when error status data has multiple sections (Shiju Jose). - Make APEI use ERST max execution time value for slow devices (Jeshua Smith). - Add support for platform notification handling to the PCC mailbox driver and modify it to support shared interrupts for multiple subspaces (Huisong Li). - Define common macros to use when referring to various bitfields in the PCC generic communications channel command and status fields and use them in some drivers (Sudeep Holla). * acpi-video: ACPI: video: Add acpi_backlight=vendor quirk for Toshiba Portégé R100 ACPI: video: Add "vendor" quirks for 3 Lenovo x86 Android tablets ACPI: video: Move Xiaomi Mi Pad 2 quirk to its own section * acpi-prm: ACPI: PRM: Annotate struct prm_module_info with __counted_by * acpi-apei: ACPI: APEI: Use ERST timeout for slow devices ACPI: APEI: Fix AER info corruption when error status data has multiple sections * acpi-pcc: soc: kunpeng_hccs: Migrate to use generic PCC shmem related macros hwmon: (xgene) Migrate to use generic PCC shmem related macros i2c: xgene-slimpro: Migrate to use generic PCC shmem related macros ACPI: PCC: Add PCC shared memory region command and status bitfields mailbox: pcc: Support shared interrupt for multiple subspaces mailbox: pcc: Add support for platform notification handling
2023-10-06Merge tag 'pci-v6.6-fixes-2' of ↵Linus Torvalds4-19/+43
git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci Pull PCI fixes from Bjorn Helgaas: - Fix a qcom register offset that broke IPQ8074 PCIe controller enumeration (Sricharan Ramabadhran) - Handle interrupt parsing failures when creating a device tree node to avoid using uninitialized data (Lizhi Hou) - Clean up if adding PCI device node fails when creating a device tree node to avoid a memory leak (Lizhi Hou) - If a link is down, mark all downstream devices as "disconnected" so we don't wait for them on resume (Mika Westerberg) * tag 'pci-v6.6-fixes-2' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci: PCI/PM: Mark devices disconnected if upstream PCIe link is down on resume PCI: of: Destroy changeset when adding PCI device node fails PCI: of_property: Handle interrupt parsing failures PCI: qcom: Fix IPQ8074 enumeration
2023-09-30PCI/PM: Mark devices disconnected if upstream PCIe link is down on resumeMika Westerberg1-1/+13
Mark Blakeney reported that when suspending system with a Thunderbolt dock connected and then unplugging the dock before resume (which is pretty normal flow with laptops), resuming takes long time. What happens is that the PCIe link from the root port to the PCIe switch inside the Thunderbolt device does not train (as expected, the link is unplugged): pcieport 0000:00:07.2: restoring config space at offset 0x24 (was 0x3bf12001, writing 0x3bf12001) pcieport 0000:00:07.0: waiting 100 ms for downstream link pcieport 0000:01:00.0: not ready 1023ms after resume; giving up However, at this point we still try to resume the devices below that unplugged link: pcieport 0000:01:00.0: Unable to change power state from D3cold to D0, device inaccessible ... pcieport 0000:01:00.0: restoring config space at offset 0x38 (was 0xffffffff, writing 0x0) ... pcieport 0000:02:02.0: waiting 100 ms for downstream link, after activation And this is the link from PCIe switch downstream port to the xHCI on the dock: xhci_hcd 0000:03:00.0: not ready 65535ms after resume; giving up xhci_hcd 0000:03:00.0: Unable to change power state from D3cold to D0, device inaccessible xhci_hcd 0000:03:00.0: restoring config space at offset 0x3c (was 0xffffffff, writing 0x1ff) This ends up slowing down the resume time considerably. For this reason mark these devices as disconnected if the link above them did not train properly. Fixes: e8b908146d44 ("PCI/PM: Increase wait time after resume") Link: https://lore.kernel.org/r/20230918053041.1018876-1-mika.westerberg@linux.intel.com Reported-by: Mark Blakeney <mark.blakeney@bullet-systems.net> Closes: https://bugzilla.kernel.org/show_bug.cgi?id=217915 Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Lukas Wunner <lukas@wunner.de> Cc: stable@vger.kernel.org # v6.4+
2023-09-30PCI: of: Destroy changeset when adding PCI device node failsLizhi Hou1-8/+11
Previously of_pci_make_dev_node() leaked a cset if it failed to create a device node for the PCI device with of_changeset_create_node(). Destroy the cset if of_changeset_create_node() fails. Fixes: 407d1a51921e ("PCI: Create device tree node for bridge") Link: https://lore.kernel.org/r/1696007417-42059-1-git-send-email-lizhi.hou@amd.com Reported-by: Herve Codina <herve.codina@bootlin.com> Closes: https://lore.kernel.org/all/20230911171319.495bb837@bootlin.com/ Signed-off-by: Lizhi Hou <lizhi.hou@amd.com> [bhelgaas: commit log] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Herve Codina <herve.codina@bootlin.com>
2023-09-30PCI: of_property: Handle interrupt parsing failuresLizhi Hou1-7/+18
of_pci_prop_intr_map() uses uninitialized addr_sz[] values if of_irq_parse_raw() fails, which leads to intermittent crashes. Clear addr_sz[] before use so we never use uninitialized elements. If no valid IRQs are parsed, don't bother adding the interrupt-map property. Fixes: 407d1a51921e ("PCI: Create device tree node for bridge") Link: https://lore.kernel.org/r/1696007448-42127-1-git-send-email-lizhi.hou@amd.com Reported-by: Jonathan Cameron <Jonathan.Cameron@Huawei.com> Closes: https://lore.kernel.org/all/20230911154856.000076c3@Huawei.com/ Reported-by: Herve Codina <herve.codina@bootlin.com> Closes: https://lore.kernel.org/all/20230911171319.495bb837@bootlin.com/ Signed-off-by: Lizhi Hou <lizhi.hou@amd.com> [bhelgaas: commit log, add similar report from Herve] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Herve Codina <herve.codina@bootlin.com>
2023-09-29PCI: qcom: Fix IPQ8074 enumerationSricharan Ramabadhran1-3/+1
PARF_SLV_ADDR_SPACE_SIZE_2_3_3 is used by qcom_pcie_post_init_2_3_3(). This PCIe slave address space size register offset is 0x358 but was incorrectly changed to 0x16c by 39171b33f652 ("PCI: qcom: Remove PCIE20_ prefix from register definitions"). This prevented access to slave address space registers like iATU, etc., so the IPQ8074 PCIe controller was not enumerated. Revert back to the correct 0x358 offset and remove the unused PARF_SLV_ADDR_SPACE_SIZE_2_3_3. Fixes: 39171b33f652 ("PCI: qcom: Remove PCIE20_ prefix from register definitions") Link: https://lore.kernel.org/r/20230919102948.1844909-1-quic_srichara@quicinc.com Tested-by: Robert Marko <robimarko@gmail.com> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> [bhelgaas: commit log] Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Manivannan Sadhasivam <mani@kernel.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org> Cc: stable@vger.kernel.org # v6.4+
2023-09-21ACPI: APEI: Fix AER info corruption when error status data has multiple sectionsShiju Jose1-0/+10
ghes_handle_aer() passes AER data to the PCI core for logging and recovery by calling aer_recover_queue() with a pointer to struct aer_capability_regs. The problem was that aer_recover_queue() queues the pointer directly without copying the aer_capability_regs data. The pointer was to the ghes->estatus buffer, which could be reused before aer_recover_work_func() reads the data. To avoid this problem, allocate a new aer_capability_regs structure from the ghes_estatus_pool, copy the AER data from the ghes->estatus buffer into it, pass a pointer to the new struct to aer_recover_queue(), and free it after aer_recover_work_func() has processed it. Reported-by: Bjorn Helgaas <helgaas@kernel.org> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Shiju Jose <shiju.jose@huawei.com> [ rjw: Subject edits ] Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2023-09-12PCI/AER: Export pcie_aer_is_native()Smita Koralahalli2-2/+1
Export and move the declaration of pcie_aer_is_native() to a common header file to be reused by cxl/pci module. Signed-off-by: Smita Koralahalli <Smita.KoralahalliChannabasappa@amd.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Kuppuswamy Sathyanarayanan <sathyanarayanan.kuppuswamy@linux.intel.com> Reviewed-by: Robert Richter <rrichter@amd.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Reviewed-by: Dave Jiang <dave.jiang@intel.com> Link: https://lore.kernel.org/r/20230823234305.27333-3-Smita.KoralahalliChannabasappa@amd.com Signed-off-by: Dan Williams <dan.j.williams@intel.com>
2023-09-09Merge tag 'pci-v6.6-fixes-1' of ↵Linus Torvalds3-2/+3
git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci Pull PCI fixes from Bjorn Helgaas: - Add PCI_DYNAMIC_OF_NODES dependency on OF_IRQ to fix sparc64 build error (Lizhi Hou) - After coalescing host bridge resources, free any released resources to avoid a leak (Ross Lagerwall) - Revert a quirk that prevented NVIDIA T4 GPUs from using Secondary Bus Reset. The quirk worked around an issue that we now think is related to the Root Port, not the GPU (Bjorn Helgaas) * tag 'pci-v6.6-fixes-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci: Revert "PCI: Mark NVIDIA T4 GPUs to avoid bus reset" PCI: Free released resource after coalescing PCI: Fix CONFIG_PCI_DYNAMIC_OF_NODES kconfig dependencies
2023-09-08Revert "PCI: Mark NVIDIA T4 GPUs to avoid bus reset"Bjorn Helgaas1-1/+1
This reverts commit d5af729dc2071273f14cbb94abbc60608142fd83. d5af729dc207 ("PCI: Mark NVIDIA T4 GPUs to avoid bus reset") avoided Secondary Bus Reset on the T4 because the reset seemed to not work when the T4 was directly attached to a Root Port. But NVIDIA thinks the issue is probably related to some issue with the Root Port, not with the T4. The T4 provides neither PM nor FLR reset, so masking bus reset compromises this device for assignment scenarios. Revert d5af729dc207 as requested by Wu Zongyong. This will leave SBR broken in the specific configuration Wu tested, as it was in v6.5, so Wu will debug that further. Link: https://lore.kernel.org/r/ZPqMCDWvITlOLHgJ@wuzongyong-alibaba Link: https://lore.kernel.org/r/20230908201104.GA305023@bhelgaas Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2023-09-06PCI: Free released resource after coalescingRoss Lagerwall1-0/+1
release_resource() doesn't actually free the resource or resource list entry so free the resource list entry to avoid a leak. Closes: https://lore.kernel.org/r/878r9sga1t.fsf@kernel.org/ Fixes: e54223275ba1 ("PCI: Release resource invalidated by coalescing") Link: https://lore.kernel.org/r/20230906110846.225369-1-ross.lagerwall@citrix.com Reported-by: Kalle Valo <kvalo@kernel.org> Tested-by: Kalle Valo <kvalo@kernel.org> Signed-off-by: Ross Lagerwall <ross.lagerwall@citrix.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: stable@vger.kernel.org # v5.16+
2023-09-05PCI: Fix CONFIG_PCI_DYNAMIC_OF_NODES kconfig dependenciesLizhi Hou1-1/+1
Generating interrupt-map property depends on of_irq_parse_raw() which is enabled by CONFIG_OF_IRQ. Change CONFIG_PCI_DYNAMIC_OF_NODES dependency from CONFIG_OF to CONFIG_OF_IRQ. Closes: https://lore.kernel.org/linux-devicetree/2187619d-55bc-41bb-bbb4-6059399db997@roeck-us.net/ Fixes: 407d1a51921e ("PCI: Create device tree node for bridge") Link: https://lore.kernel.org/r/1693505947-29786-1-git-send-email-lizhi.hou@amd.com Reported-by: Guenter Roeck <groeck7@gmail.com> Signed-off-by: Lizhi Hou <lizhi.hou@amd.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2023-08-31Merge tag 'powerpc-6.6-1' of ↵Linus Torvalds1-3/+82
git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc updates from Michael Ellerman: - Add HOTPLUG_SMT support (/sys/devices/system/cpu/smt) and honour the configured SMT state when hotplugging CPUs into the system - Combine final TLB flush and lazy TLB mm shootdown IPIs when using the Radix MMU to avoid a broadcast TLBIE flush on exit - Drop the exclusion between ptrace/perf watchpoints, and drop the now unused associated arch hooks - Add support for the "nohlt" command line option to disable CPU idle - Add support for -fpatchable-function-entry for ftrace, with GCC >= 13.1 - Rework memory block size determination, and support 256MB size on systems with GPUs that have hotpluggable memory - Various other small features and fixes Thanks to Andrew Donnellan, Aneesh Kumar K.V, Arnd Bergmann, Athira Rajeev, Benjamin Gray, Christophe Leroy, Frederic Barrat, Gautam Menghani, Geoff Levand, Hari Bathini, Immad Mir, Jialin Zhang, Joel Stanley, Jordan Niethe, Justin Stitt, Kajol Jain, Kees Cook, Krzysztof Kozlowski, Laurent Dufour, Liang He, Linus Walleij, Mahesh Salgaonkar, Masahiro Yamada, Michal Suchanek, Nageswara R Sastry, Nathan Chancellor, Nathan Lynch, Naveen N Rao, Nicholas Piggin, Nick Desaulniers, Omar Sandoval, Randy Dunlap, Reza Arbab, Rob Herring, Russell Currey, Sourabh Jain, Thomas Gleixner, Trevor Woerner, Uwe Kleine-König, Vaibhav Jain, Xiongfeng Wang, Yuan Tan, Zhang Rui, and Zheng Zengkai. * tag 'powerpc-6.6-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (135 commits) macintosh/ams: linux/platform_device.h is needed powerpc/xmon: Reapply "Relax frame size for clang" powerpc/mm/book3s64: Use 256M as the upper limit with coherent device memory attached powerpc/mm/book3s64: Fix build error with SPARSEMEM disabled powerpc/iommu: Fix notifiers being shared by PCI and VIO buses powerpc/mpc5xxx: Add missing fwnode_handle_put() powerpc/config: Disable SLAB_DEBUG_ON in skiroot powerpc/pseries: Remove unused hcall tracing instruction powerpc/pseries: Fix hcall tracepoints with JUMP_LABEL=n powerpc: dts: add missing space before { powerpc/eeh: Use pci_dev_id() to simplify the code powerpc/64s: Move CPU -mtune options into Kconfig powerpc/powermac: Fix unused function warning powerpc/pseries: Rework lppaca_shared_proc() to avoid DEBUG_PREEMPT powerpc: Don't include lppaca.h in paca.h powerpc/pseries: Move hcall_vphn() prototype into vphn.h powerpc/pseries: Move VPHN constants into vphn.h cxl: Drop unused detach_spa() powerpc: Drop zalloc_maybe_bootmem() powerpc/powernv: Use struct opal_prd_msg in more places ...
2023-08-31Merge tag 'pci-v6.6-changes' of ↵Linus Torvalds73-677/+1443
git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci Pull PCI updates from Bjorn Helgaas: "Enumeration: - Add locking to read/modify/write PCIe Capability Register accessors for Link Control and Root Control - Use pci_dev_id() when possible instead of manually composing ID from dev->bus->number and dev->devfn Resource management: - Move prototypes for __weak sysfs resource files to linux/pci.h to fix 'no previous prototype' warnings - Make more I/O port accesses depend on HAS_IOPORT - Use devm_platform_get_and_ioremap_resource() instead of open-coding platform_get_resource() followed by devm_ioremap_resource() Power management: - Ensure devices are powered up while accessing VPD - If device is powered-up, keep it that way while polling for PME - Only read PCI_PM_CTRL register when available, to avoid reading the wrong register and corrupting dev->current_state Virtualization: - Avoid Secondary Bus Reset on NVIDIA T4 GPUs Error handling: - Remove unused pci_disable_pcie_error_reporting() - Unexport pci_enable_pcie_error_reporting(), used only by aer.c - Unexport pcie_port_bus_type, used only by PCI core VGA: - Simplify and clean up typos in VGA arbiter Apple PCIe controller driver: - Initialize pcie->nvecs (number of available MSIs) before use Broadcom iProc PCIe controller driver: - Use of_property_read_bool() instead of low-level accessors for boolean properties Broadcom STB PCIe controller driver: - Assert PERST# when probing BCM2711 because some bootloaders don't do it Freescale i.MX6 PCIe controller driver: - Add .host_deinit() callback so we can clean up things like regulators on probe failure or driver unload Freescale Layerscape PCIe controller driver: - Add support for link-down notification so the endpoint driver can process LINK_DOWN events - Add suspend/resume support, including manual PME_Turn_off/PME_TO_Ack handshake - Save Link Capabilities during probe so they can be restored when handling a link-up event, since the controller loses the Link Width and Link Speed values during reset Intel VMD host bridge driver: - Fix disable of bridge windows during domain reset; previously we cleared the base/limit registers, which actually left the windows enabled Marvell MVEBU PCIe controller driver: - Remove unused busn member Microchip PolarFlare PCIe controller driver: - Fix interrupt bit definitions so the SEC and DED interrupt handlers work correctly - Make driver buildable as a module - Read FPGA MSI configuration parameters from hardware instead of hard-coding them Microsoft Hyper-V host bridge driver: - To avoid a NULL pointer dereference, skip MSI restore after hibernate if MSI/MSI-X hasn't been enabled NVIDIA Tegra194 PCIe controller driver: - Revert 'PCI: tegra194: Enable support for 256 Byte payload' because Linux doesn't know how to reduce MPS from to 256 to 128 bytes for endpoints below a switch (because other devices below the switch might already be operating), which leads to 'Malformed TLP' errors Qualcomm PCIe controller driver: - Add DT and driver support for interconnect bandwidth voting for 'pcie-mem' and 'cpu-pcie' interconnects - Fix broken SDX65 'compatible' DT property - Configure controller so MHI bus master clock will be switched off while in ASPM L1.x states - Use alignment restriction from EPF core in EPF MHI driver - Add Endpoint eDMA support - Add MHI eDMA support - Add Snapdragon SM8450 support to the EPF MHI driversupport - Add MHI eDMA support - Add Snapdragon SM8450 support to the EPF MHI driversupport - Add MHI eDMA support - Add Snapdragon SM8450 support to the EPF MHI driversupport - Add MHI eDMA support - Add Snapdragon SM8450 support to the EPF MHI driver - Use iATU for EPF MHI transfers smaller than 4K to avoid eDMA setup latency - Add sa8775p DT binding and driver support Rockchip PCIe controller driver: - Use 64-bit mask on MSI 64-bit PCI address to avoid zeroing out the upper 32 bits SiFive FU740 PCIe controller driver: - Set the supported number of MSI vectors so we can use all available MSI interrupts Synopsys DesignWare PCIe controller driver: - Add generic dwc suspend/resume APIs (dw_pcie_suspend_noirq() and dw_pcie_resume_noirq()) to be called by controller driver suspend/resume ops, and a controller callback to send PME_Turn_Off MicroSemi Switchtec management driver: - Add support for PCIe Gen5 devices Miscellaneous: - Reorder and compress to reduce size of struct pci_dev - Fix race in DOE destroy_work_on_stack() - Add stubs to avoid casts between incompatible function types - Explicitly include correct DT includes to untangle headers" * tag 'pci-v6.6-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci: (96 commits) PCI: qcom-ep: Add ICC bandwidth voting support dt-bindings: PCI: qcom: ep: Add interconnects path PCI: qcom-ep: Treat unknown IRQ events as an error dt-bindings: PCI: qcom: Fix SDX65 compatible PCI: endpoint: Add kernel-doc for pci_epc_mem_init() API PCI: epf-mhi: Use iATU for small transfers PCI: epf-mhi: Add support for SM8450 PCI: epf-mhi: Add eDMA support PCI: qcom-ep: Add eDMA support PCI: epf-mhi: Make use of the alignment restriction from EPF core PCI/PM: Only read PCI_PM_CTRL register when available PCI: qcom: Add support for sa8775p SoC dt-bindings: PCI: qcom: Add sa8775p compatible PCI: qcom-ep: Pass alignment restriction to the EPF core PCI: Simplify pcie_capability_clear_and_set_word() control flow PCI: Tidy config space save/restore messages PCI: Fix code formatting inconsistencies PCI: Fix typos in docs and comments PCI: Fix pci_bus_resetable(), pci_slot_resetable() name typos PCI: Simplify pci_dev_driver() ...
2023-08-31Merge tag 'devicetree-for-6.6' of ↵Linus Torvalds8-0/+474
git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux Pull devicetree updates from Rob Herring: "DT core: - Add support for generating DT nodes for PCI devices. This is the groundwork for applying overlays to PCI devices containing non-discoverable downstream devices. - DT unittest additions to check reverted changesets, to test for refcount issues, and to test unresolved symbols. Also, various clean-ups of the unittest along the way. - Refactor node and property manipulation functions to better share code with old API and changeset API - Refactor changeset print functions to a common implementation - Move some platform_device specific functions into of_platform.c Bindings: - Treewide fixing of typos - Treewide clean-up of SPDX tags to use 'OR' consistently - Last chunk of dropping unnecessary quotes. With that, the check for unnecessary quotes is enabled in yamllint. - Convert ftgmac100, zynqmp-genpd, pps-gpio, syna,rmi4, and qcom,ssbi bindings to DT schema format - Add Allwinner V3s xHCI USB, Saef SF-TC154B display, QCom SM8450 Inline Crypto Engine, QCom SM6115 UFS, QCom SDM670 PDC interrupt controller, Arm 2022 Cortex cores, and QCom IPQ9574 Crypto bindings - Fixes for Rockchip DWC PCI binding - Ensure all properties are evaluated on USB connector schema - Fix dt-check-compatible script to find of_device_id instances with compiler annotations" * tag 'devicetree-for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (64 commits) dt-bindings: usb: Add V3s compatible string for OHCI dt-bindings: usb: Add V3s compatible string for EHCI dt-bindings: display: panel: mipi-dbi-spi: add Saef SF-TC154B dt-bindings: vendor-prefixes: document Saef Technology dt-bindings: thermal: lmh: update maintainer address of: unittest: Fix of_unittest_pci_node() kconfig dependencies dt-bindings: crypto: ice: Document sm8450 inline crypto engine dt-bindings: ufs: qcom: Add ICE to sm8450 example dt-bindings: ufs: qcom: Add sm6115 binding dt-bindings: ufs: qcom: Add reg-names property for ICE dt-bindings: yamllint: Enable quoted string check dt-bindings: Drop remaining unneeded quotes of: unittest-data: Fix whitespace - angular brackets of: unittest-data: Fix whitespace - indentation of: unittest-data: Fix whitespace - blank lines of: unittest-data: Convert remaining overlay DTS files to sugar syntax of: overlay: unittest: Add test for unresolved symbol of: unittest: Add separators to of_unittest_overlay_high_level() of: unittest: Cleanup partially-applied overlays of: unittest: Merge of_unittest_apply{,_revert}_overlay_check() ...
2023-08-30Merge tag 'dma-mapping-6.6-2023-08-29' of ↵Linus Torvalds1-6/+0
git://git.infradead.org/users/hch/dma-mapping Pull dma-maping updates from Christoph Hellwig: - allow dynamic sizing of the swiotlb buffer, to cater for secure virtualization workloads that require all I/O to be bounce buffered (Petr Tesarik) - move a declaration to a header (Arnd Bergmann) - check for memory region overlap in dma-contiguous (Binglei Wang) - remove the somewhat dangerous runtime swiotlb-xen enablement and unexport is_swiotlb_active (Christoph Hellwig, Juergen Gross) - per-node CMA improvements (Yajun Deng) * tag 'dma-mapping-6.6-2023-08-29' of git://git.infradead.org/users/hch/dma-mapping: swiotlb: optimize get_max_slots() swiotlb: move slot allocation explanation comment where it belongs swiotlb: search the software IO TLB only if the device makes use of it swiotlb: allocate a new memory pool when existing pools are full swiotlb: determine potential physical address limit swiotlb: if swiotlb is full, fall back to a transient memory pool swiotlb: add a flag whether SWIOTLB is allowed to grow swiotlb: separate memory pool data from other allocator data swiotlb: add documentation and rename swiotlb_do_find_slots() swiotlb: make io_tlb_default_mem local to swiotlb.c swiotlb: bail out of swiotlb_init_late() if swiotlb is already allocated dma-contiguous: check for memory region overlap dma-contiguous: support numa CMA for specified node dma-contiguous: support per-numa CMA for all architectures dma-mapping: move arch_dma_set_mask() declaration to header swiotlb: unexport is_swiotlb_active x86: always initialize xen-swiotlb when xen-pcifront is enabling xen/pci: add flag for PCI passthrough being possible
2023-08-29Merge branch 'pci/misc'Bjorn Helgaas47-133/+102
- Reorder struct pci_dev to avoid holes and reduce size (Christophe JAILLET) - Change pdev->rom_attr_enabled to single bit since it's only a boolean value (Christophe JAILLET) - Use struct_size() in pirq_convert_irt_table() instead of hand-writing it (Christophe JAILLET) - Explicitly include correct DT includes to untangle headers (Rob Herring) - Fix a DOE race between destroy_work_on_stack() and the stack-allocated task->work struct going out of scope in pci_doe() (Ira Weiny) - Use pci_dev_id() when possible instead of manually composing ID from dev->bus->number and dev->devfn (Xiongfeng Wang, Zheng Zengkai) - Move pci_create_resource_files() declarations to linux/pci.h for alpha build warnings (Arnd Bergmann) - Remove unused hotplug function declarations (Yue Haibing) - Remove unused mvebu struct mvebu_pcie.busn (Pali Rohár) - Unexport pcie_port_bus_type (Bjorn Helgaas) - Remove unnecessary sysfs ID local variable initialization (Bjorn Helgaas) - Fix BAR value printk formatting to accommodate 32-bit values (Bjorn Helgaas) - Use consistent pointer types for config access syscall get_user() and put_user() uses (Bjorn Helgaas) - Simplify AER_RECOVER_RING_SIZE definition (Bjorn Helgaas) - Simplify pci_pio_to_address() (Bjorn Helgaas) - Simplify pci_dev_driver() (Bjorn Helgaas) - Fix pci_bus_resetable(), pci_slot_resetable() name typos (Bjorn Helgaas) - Fix code and doc typos and code formatting (Bjorn Helgaas) - Tidy config space save/restore messages (Bjorn Helgaas) * pci/misc: PCI: Tidy config space save/restore messages PCI: Fix code formatting inconsistencies PCI: Fix typos in docs and comments PCI: Fix pci_bus_resetable(), pci_slot_resetable() name typos PCI: Simplify pci_dev_driver() PCI: Simplify pci_pio_to_address() PCI/AER: Simplify AER_RECOVER_RING_SIZE definition PCI: Use consistent put_user() pointer types PCI: Fix printk field formatting PCI: Remove unnecessary initializations PCI: Unexport pcie_port_bus_type PCI: mvebu: Remove unused busn member PCI: Remove unused function declarations PCI/sysfs: Move declarations to linux/pci.h PCI/P2PDMA: Use pci_dev_id() to simplify the code PCI/IOV: Use pci_dev_id() to simplify the code PCI/AER: Use pci_dev_id() to simplify the code PCI: apple: Use pci_dev_id() to simplify the code PCI/DOE: Fix destroy_work_on_stack() race PCI: Explicitly include correct DT includes x86/PCI: Use struct_size() in pirq_convert_irt_table() PCI: Change pdev->rom_attr_enabled to single bit PCI: Reorder pci_dev fields to reduce holes
2023-08-29Merge branch 'pci/controller/switchtec'Bjorn Helgaas2-61/+133
- Add support for Switechtec PCIe Gen5 devices (Kelvin Cao) * pci/controller/switchtec: PCI: switchtec: Add support for PCIe Gen5 devices PCI: switchtec: Use normal comment style
2023-08-29Merge branch 'pci/controller/resources'Bjorn Helgaas4-8/+4
- Use Use devm_platform_get_and_ioremap_resource() instead of open-coding platform_get_resource() followed by devm_ioremap_resource() (Yang Li) * pci/controller/resources: PCI: imx6: Use devm_platform_get_and_ioremap_resource() PCI: xgene-msi: Use devm_platform_get_and_ioremap_resource() PCI: v3: Use devm_platform_get_and_ioremap_resource() PCI: rcar-gen2: Use devm_platform_get_and_ioremap_resource()
2023-08-29Merge branch 'pci/controller/remove-void-cast'Bjorn Helgaas3-8/+24
- Add stubs for devm action functions that call clk_disable_unprepare() to avoid casts between incompatible function types (Krzysztof Wilczyński) * pci/controller/remove-void-cast: PCI: microchip: Remove cast between incompatible function type PCI: keembay: Remove cast between incompatible function type PCI: meson: Remove cast between incompatible function type
2023-08-29Merge branch 'pci/controller/vmd'Bjorn Helgaas1-2/+17
- Fix disable of bridge windows during domain reset; previously we cleared the base/limit registers, which left the windows enabled (Nirmal Patel) * pci/controller/vmd: PCI: vmd: Disable bridge window for domain reset
2023-08-29Merge branch 'pci/controller/tegra194'Bjorn Helgaas1-10/+0
- Revert "PCI: tegra194: Enable support for 256 Byte payload" because Linux doesn't know how to reduce MPS from to 256 to 128 bytes for Endpoints below a Switch (because other devices below the Switch might already be operating), which leads to Malformed TLP errors (Vidya Sagar) * pci/controller/tegra194: Revert "PCI: tegra194: Enable support for 256 Byte payload"
2023-08-29Merge branch 'pci/controller/rockchip'Bjorn Helgaas1-3/+3
- Use 64-bit mask on MSI 64-bit PCI address to avoid zeroing out the upper 32 bits (Rick Wertenbroek) * pci/controller/rockchip: PCI: rockchip: Use 64-bit mask on MSI 64-bit PCI address
2023-08-29Merge branch 'pci/controller/qcom-ep'Bjorn Helgaas1-1/+73
- Log unknown Qcom Endpoint IRQ events at error level, not debug level (Manivannan Sadhasivam) - Add DT and driver support for qcom interconnect bandwidth voting for "pcie-mem" and "cpu-pcie" interconnects (Krishna chaitanya chundru) * pci/controller/qcom-ep: PCI: qcom-ep: Add ICC bandwidth voting support dt-bindings: PCI: qcom: ep: Add interconnects path PCI: qcom-ep: Treat unknown IRQ events as an error
2023-08-29Merge branch 'pci/controller/qcom-edma'Bjorn Helgaas3-17/+284
- Pass the Qcom Endpoint 4K alignment requirement for outbound windows to the EPF core so EPF drivers can use it (Manivannan Sadhasivam) - Use alignment restriction from EPF core in Qcom EPF MHI driver (Manivannan Sadhasivam) - Add Qcom Endpoint eDMA support by enabling the eDMA IRQ (Manivannan Sadhasivam) - Add Qcom MHI eDMA support (Manivannan Sadhasivam) - Add Qcom Snapdragon SM8450 support to the EPF MHI driver (Manivannan Sadhasivam) - Use iATU for EPF MHI transfers smaller than 4K to avoid eDMA setup latency (Manivannan Sadhasivam) - Add pci_epc_mem_init() kernel-doc (Manivannan Sadhasivam) * pci/controller/qcom-edma: PCI: endpoint: Add kernel-doc for pci_epc_mem_init() API PCI: epf-mhi: Use iATU for small transfers PCI: epf-mhi: Add support for SM8450 PCI: epf-mhi: Add eDMA support PCI: qcom-ep: Add eDMA support PCI: epf-mhi: Make use of the alignment restriction from EPF core PCI: qcom-ep: Pass alignment restriction to the EPF core
2023-08-29Merge branch 'pci/controller/qcom'Bjorn Helgaas2-1/+2
- Configure controller so MHI bus master clock will be switched off while in ASPM L1.x states (Manivannan Sadhasivam) - Add sa8775p DT binding and driver support (Mrinmay Sarkar) - Fix broken DT SDX65 "compatible" property (Krzysztof Kozlowski) * pci/controller/qcom: dt-bindings: PCI: qcom: Fix SDX65 compatible PCI: qcom: Add support for sa8775p SoC dt-bindings: PCI: qcom: Add sa8775p compatible PCI: qcom-ep: Switch MHI bus master clock off during L1SS
2023-08-29Merge branch 'pci/controller/microchip'Bjorn Helgaas2-162/+233
- Fix DED and SEC interrupt bit offsets so interrupt handlers work correctly (Daire McNamara) - Make driver buildable as a module (Daire McNamara) - Reorganize register #defines to align with hardware docs (Daire McNamara) - Tweak register accessors to simplify callers (Daire McNamara) - Refactor interrupt initialisation (Daire McNamara) - Read FPGA MSI configuration parameters from hardware instead of hard-coding them (Daire McNamara) - Re-partition code between probe() and init() (Daire McNamara) * pci/controller/microchip: PCI: microchip: Re-partition code between probe() and init() PCI: microchip: Gather MSI information from hardware config registers PCI: microchip: Clean up initialisation of interrupts PCI: microchip: Enable event handlers to access bridge and control pointers PCI: microchip: Align register, offset, and mask names with HW docs PCI: microchip: Enable building driver as a module PCI: microchip: Correct the DED and SEC interrupt bit offsets
2023-08-29Merge branch 'pci/controller/layerscape'Bjorn Helgaas1-0/+20
- Add support for link-down notification so the endpoint driver can process LINK_DOWN events (Frank Li) - Save Link Capabilities during probe so they can be restored when handling a link-up event, since the controller loses the Link Width and Link Speed values during reset (Xiaowei Bao) * pci/controller/layerscape: PCI: layerscape: Add workaround for lost link capabilities during reset PCI: layerscape: Add support for link-down notification
2023-08-29Merge branch 'pci/controller/iproc'Bjorn Helgaas1-3/+2
- Use of_property_read_bool() instead of low-level accessors for boolean properties (Rob Herring) * pci/controller/iproc: PCI: iproc: Use of_property_read_bool() for boolean properties
2023-08-29Merge branch 'pci/controller/hv'Bjorn Helgaas1-0/+3
- To avoid a NULL pointer dereference, skip MSI restore after hibernate if MSI/MSI-X hasn't been enabled (Dexuan Cui) * pci/controller/hv: PCI: hv: Fix a crash in hv_pci_restore_msi_msg() during hibernation
2023-08-29Merge branch 'pci/controller/fu740'Bjorn Helgaas1-0/+1
- Set the supported number of MSI vectors so we can use all available MSI interrupts (Yong-Xuan Wang) * pci/controller/fu740: PCI: fu740: Set the number of MSI vectors
2023-08-29Merge branch 'pci/controller/dwc'Bjorn Helgaas5-9/+237
- Add an imx6 .host_deinit() callback so we can clean up things like regulators on probe failure or driver unload (Mark Brown) - Add PCIE_PME_TO_L2_TIMEOUT_US value for controller drivers that need to manually synchronize power removal (Frank Li) - Add generic dwc suspend/resume APIs (dw_pcie_suspend_noirq() and dw_pcie_resume_noirq()) to be called by controller driver suspend/resume ops, and a controller callback to send PME_Turn_Off (Frank Li) - Add layerscape suspend/resume support, including manual PME_Turn_off/PME_TO_Ack handshake (Hou Zhiqiang, Frank Li) * pci/controller/dwc: PCI: layerscape: Add power management support for ls1028a PCI: dwc: Implement generic suspend/resume functionality PCI: Add PCIE_PME_TO_L2_TIMEOUT_US L2 ready timeout value PCI: dwc: Provide deinit callback for i.MX
2023-08-29Merge branch 'pci/controller/brcmstb'Bjorn Helgaas1-1/+5
- Assert PERST# when probing BCM2711 because some bootloaders don't do it (Jim Quinlan) * pci/controller/brcmstb: PCI: brcmstb: Remove stale comment PCI: brcmstb: Assert PERST# on BCM2711
2023-08-29Merge branch 'pci/controller/apple'Bjorn Helgaas1-1/+5
- Initialize pcie->nvecs (number of available MSIs) before use (Sven Peter) * pci/controller/apple: PCI: apple: Initialize pcie->nvecs before use
2023-08-29Merge branch 'pci/vpd'Bjorn Helgaas2-9/+48
- Ensure device is accessible before VPD access via sysfs (Alex Williamson) - Ensure device doesn't go to a low-power state while we're polling for PME (Alex Williamson) * pci/vpd: PCI: Fix runtime PM race with PME polling PCI/VPD: Add runtime power management to sysfs interface
2023-08-29Merge branch 'pci/vga'Bjorn Helgaas1-178/+180
- Correct parameter types for vga_str_to_iostate() and vga_update_device_decodes() (Sui Jingfeng) - Simplify vga_arbiter_notify_clients() (Sui Jingfeng) - Simplify vga_client_register() (Sui Jingfeng) - Replace MIT license text with SPDX identifier (Sui Jingfeng) - Fix lots of comment typos (Sui Jingfeng) * pci/vga: PCI/VGA: Fix typos PCI/VGA: Replace full MIT license text with SPDX identifier PCI/VGA: Simplify vga_client_register() PCI/VGA: Simplify vga_arbiter_notify_clients() PCI/VGA: Correct vga_update_device_decodes() parameter type PCI/VGA: Correct vga_str_to_iostate() io_state parameter type
2023-08-29Merge branch 'pci/virtualization'Bjorn Helgaas1-1/+1
- Avoid bus resets on NVIDIA T4 GPUs because they don't seem to recover (Wu Zongyong) * pci/virtualization: PCI: Mark NVIDIA T4 GPUs to avoid bus reset
2023-08-29Merge branch 'pci/pm'Bjorn Helgaas1-4/+9
- Only read PCI_PM_CTRL register when available, to avoid reading the wrong register and corrupting dev->current_state (Feiyang Chen) * pci/pm: PCI/PM: Only read PCI_PM_CTRL register when available
2023-08-29Merge branch 'pci/pcie-rmw'Bjorn Helgaas5-46/+45
- Add locking for read/modify/write PCIe Capability Register accessors for Link Control and Root Control (Ilpo Järvinen) - Use PCIe RMW accessors for Link Control updates in PCI core, pciehp, amdgpu, radeon, mlx5, ath10k, ath11k, ath12k (Ilpo Järvinen) - Convert PCIBIOS error values in mlx5 to generic errnos (Ilpo Järvinen) - Simplify pcie_capability_clear_and_set_word() control flow (Bjorn Helgaas) * pci/pcie-rmw: PCI: Simplify pcie_capability_clear_and_set_word() control flow net/mlx5: Convert PCI error values to generic errnos PCI: Document the Capability accessor RMW improvements wifi: ath10k: Use RMW accessors for changing LNKCTL wifi: ath12k: Use RMW accessors for changing LNKCTL wifi: ath11k: Use RMW accessors for changing LNKCTL net/mlx5: Use RMW accessors for changing LNKCTL drm/radeon: Use RMW accessors for changing LNKCTL drm/amdgpu: Use RMW accessors for changing LNKCTL PCI/ASPM: Use RMW accessors for changing LNKCTL PCI: pciehp: Use RMW accessors for changing LNKCTL PCI: Make link retraining use RMW accessors for changing LNKCTL PCI: Add locking to RMW PCI Express Capability Register accessors
2023-08-29Merge branch 'pci/ioport'Bjorn Helgaas2-0/+6
- Make I/O resources depend on CONFIG_HAS_IOPORT so inw() and friends can be completely omitted on architectures without I/O port support (Niklas Schnelle) * pci/ioport: PCI/sysfs: Make I/O resource depend on HAS_IOPORT PCI: Make quirk using inw() depend on HAS_IOPORT
2023-08-29Merge branch 'pci/hotplug'Bjorn Helgaas1-5/+5
- Make ibmphp read-only arrays static instead of putting them on the stack (Colin Ian King) * pci/hotplug: PCI: ibmphp: Make read-only arrays static
2023-08-29PCI: qcom-ep: Add ICC bandwidth voting supportKrishna chaitanya chundru1-0/+72
Add support for voting interconnect (ICC) bandwidth based on the link speed and width. This commit is inspired from the basic interconnect support added to pcie-qcom driver in commit c4860af88d0c ("PCI: qcom: Add basic interconnect support"). The interconnect support is kept optional to be backward compatible with legacy device trees. [kwilczynski: add missing kernel-doc for the icc_mem variable] Link: https://lore.kernel.org/linux-pci/1689751218-24492-5-git-send-email-quic_krichai@quicinc.com Signed-off-by: Krishna chaitanya chundru <quic_krichai@quicinc.com> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
2023-08-29PCI: qcom-ep: Treat unknown IRQ events as an errorManivannan Sadhasivam1-1/+1
Sometimes, the Qcom PCIe EP controller can receive some interrupts unknown to the driver, like safety interrupts in newer SoCs. In those cases, if the driver doesn't clear the interrupts, it will end up in an interrupt storm. However, the users will not know about it because the log is treated as a debug message. So let's treat the unknown event log as an error so that it at least makes the user aware, thereby getting fixed eventually. [kwilczynski: commit log] Link: https://lore.kernel.org/linux-pci/20230726152931.18134-1-manivannan.sadhasivam@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
2023-08-26PCI: endpoint: Add kernel-doc for pci_epc_mem_init() APIManivannan Sadhasivam1-0/+10
Add missing kernel-doc for pci_epc_mem_init() API. Link: https://lore.kernel.org/linux-pci/20230717065459.14138-8-manivannan.sadhasivam@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org> Reviewed-by: Randy Dunlap <rdunlap@infradead.org>
2023-08-26PCI: epf-mhi: Use iATU for small transfersManivannan Sadhasivam1-0/+6
For transfers below 4K, let's use iATU since using eDMA for such small transfers is inefficient. This is mainly because setting up an eDMA transfer and waiting for completion adds some latency. This latency is negligible for large transfers but not for the smaller ones. With using iATU, there is an increase in ~50Mbps throughput on both MHI UL (Uplink) and DL (Downlink) channels. [kwilczynski: commit log] Link: https://lore.kernel.org/linux-pci/20230717065459.14138-7-manivannan.sadhasivam@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
2023-08-26PCI: epf-mhi: Add support for SM8450Manivannan Sadhasivam1-3/+19
Add support for Qualcomm Snapdragon SM8450 SoC to the EPF driver. SM8450 has the dedicated PID (0x0306) and supports eDMA. Currently, it has no fixed PCI class, so it is being advertised as "PCI_CLASS_OTHERS". Link: https://lore.kernel.org/linux-pci/20230717065459.14138-6-manivannan.sadhasivam@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
2023-08-26PCI: epf-mhi: Add eDMA supportManivannan Sadhasivam1-6/+231
Add support for Embedded DMA (eDMA) available in the DesignWare PCIe IP to transfer the MHI buffers between the host and the endpoint. The eDMA use helps achieve greater throughput as the transfers are offloaded from CPUs. For differentiating the iATU and eDMA APIs, the pci_epf_mhi_{read/write} APIs are renamed to pci_epf_mhi_iatu_{read/write} and separate eDMA specific APIs pci_epf_mhi_edma_{read/write} are introduced. Platforms that require eDMA support can pass the MHI_EPF_USE_DMA flag through pci_epf_mhi_ep_info. [kwilczynski: commit log] Link: https://lore.kernel.org/linux-pci/20230717065459.14138-5-manivannan.sadhasivam@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
2023-08-26PCI: qcom-ep: Add eDMA supportManivannan Sadhasivam1-1/+3
Qualcomm PCIe Endpoint controllers have the in-built Embedded DMA (eDMA) peripheral for offloading the data transfer between the PCIe bus and memory. Let's add support for it by enabling the eDMA IRQ in the driver. The eDMA DMA Engine driver will handle the rest of the functionality. Since the eDMA on Qualcomm platforms only uses a single IRQ for all channels, use 1 for edma.nr_irqs. [kwilczynski: commit log] Link: https://lore.kernel.org/linux-pci/20230717065459.14138-4-manivannan.sadhasivam@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
2023-08-26PCI: epf-mhi: Make use of the alignment restriction from EPF coreManivannan Sadhasivam1-7/+14
Instead of hardcoding the alignment restriction in the EPF_MHI driver, make use of the info available from the EPF core that reflects the alignment restriction of the endpoint controller. For this purpose, let's introduce the get_align_offset() static function. [kwilczynski: update get_align_offset() to avoid issues on 32-bit architectures] Link: https://lore.kernel.org/linux-pci/20230717065459.14138-3-manivannan.sadhasivam@linaro.org Link: https://lore.kernel.org/linux-pci/20230826150626.23309-1-manivannan.sadhasivam@linaro.org Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Krzysztof Wilczyński <kwilczynski@kernel.org>
2023-08-26PCI/PM: Only read PCI_PM_CTRL register when availableFeiyang Chen1-4/+9
For a device with no Power Management Capability, pci_power_up() previously returned 0 (success) if the platform was able to put the device in D0, which led to pci_set_full_power_state() trying to read PCI_PM_CTRL, even though it doesn't exist. Since dev->pm_cap == 0 in this case, pci_set_full_power_state() actually read the wrong register, interpreted it as PCI_PM_CTRL, and corrupted dev->current_state. This led to messages like this in some cases: pci 0000:01:00.0: Refused to change power state from D3hot to D0 To prevent this, make pci_power_up() always return a negative failure code if the device lacks a Power Management Capability, even if non-PCI platform power management has been able to put the device in D0. The failure will prevent pci_set_full_power_state() from trying to access PCI_PM_CTRL. Fixes: e200904b275c ("PCI/PM: Split pci_power_up()") Link: https://lore.kernel.org/r/20230824013738.1894965-1-chenfeiyang@loongson.cn Signed-off-by: Feiyang Chen <chenfeiyang@loongson.cn> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: "Rafael J. Wysocki" <rafael@kernel.org> Cc: stable@vger.kernel.org # v5.19+
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