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AgeCommit message (Expand)AuthorFilesLines
2022-08-19perf: riscv legacy: fix kerneldoc comment warningConor Dooley1-1/+1
2022-08-12perf: riscv_pmu{,_sbi}: Miscallenous improvement & fixesPalmer Dabbelt2-15/+16
2022-08-12RISC-V: Move counter info definition to sbi header fileAtish Patra1-14/+0
2022-08-12RISC-V: Fix SBI PMU calls for RV32Atish Patra1-0/+10
2022-08-12RISC-V: Update user page mapping only once during startAtish Patra2-1/+1
2022-08-12RISC-V: Fix counter restart during overflow for RV32Atish Patra1-0/+5
2022-07-19drivers/perf: arm_spe: Fix consistency of SYS_PMSCR_EL1.CXAnshuman Khandual1-2/+20
2022-07-19perf: RISC-V: Add of_node_put() when breaking out of for_each_of_cpu_node()Liang He1-1/+4
2022-07-06drivers/perf: hisi: add driver for HNS3 PMUGuangbin Huang3-0/+1682
2022-07-06drivers/perf: riscv_pmu_sbi: perf formatNikita Shubin1-0/+20
2022-07-06perf/arm-cci: Use the bitmap API to allocate bitmapsChristophe JAILLET1-5/+4
2022-07-06drivers/perf: riscv_pmu: Add riscv pmu pm notifierEric Lin2-6/+79
2022-06-27perf: hisi: Extract hisi_pmu_initChen Jun7-74/+25
2022-06-24perf/marvell_cn10k: Fix TAD PMU register offsetTanmay Jagdale1-5/+3
2022-06-24perf/marvell_cn10k: Remove useless license text when SPDX-License-Identifier ...Christophe JAILLET1-4/+0
2022-06-23perf/arm-cci: fix typo in commentJulia Lawall1-1/+1
2022-06-23drivers/perf:Directly use ida_alloc()/free()keliu1-3/+3
2022-06-23drivers/perf: Directly use ida_alloc()/free()keliu1-3/+3
2022-05-24Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/a...Linus Torvalds10-144/+920
2022-05-12perf/arm-cmn: Decode CAL devices properly in debugfsRobin Murphy1-1/+2
2022-05-11perf/arm-cmn: Fix filter_sel lookupRobin Murphy1-1/+1
2022-05-10perf/marvell_cn10k: Fix tad_pmu_event_init() to check pmu type firstTanmay Jagdale1-3/+3
2022-05-06drivers/perf: hisi: Add Support for CPA PMUQi Liu2-1/+410
2022-05-06drivers/perf: hisi: Associate PMUs in SICL with CPUs onlineQi Liu3-11/+12
2022-05-06drivers/perf: arm_spe: Expose saturating counter to 16-bitShaokun Zhang1-0/+3
2022-05-06perf/arm-cmn: Add CMN-700 supportRobin Murphy1-16/+220
2022-05-06perf/arm-cmn: Refactor occupancy filter selectorRobin Murphy1-72/+98
2022-05-06perf/arm-cmn: Add CMN-650 supportRobin Murphy1-46/+176
2022-05-06perf: check return value of armpmu_request_irq()Ren Yu1-1/+3
2022-05-06perf: RISC-V: Remove non-kernel-doc ** commentsPalmer Dabbelt1-4/+4
2022-04-13arm_pmu: Validate single/group leader eventsRob Herring1-6/+4
2022-04-08perf/imx_ddr: Fix undefined behavior due to shift overflowing the constantBorislav Petkov1-1/+1
2022-04-04perf: MARVELL_CN10K_DDR_PMU should depend on ARCH_THUNDERGeert Uytterhoeven1-1/+1
2022-04-04perf: qcom_l2_pmu: fix an incorrect NULL check on list iteratorXiaomeng Tong1-3/+3
2022-03-25Merge tag 'riscv-for-linus-5.18-mw0' of git://git.kernel.org/pub/scm/linux/ke...Linus Torvalds5-0/+1289
2022-03-25Merge tag 'iommu-updates-v5.18' of git://git.kernel.org/pub/scm/linux/kernel/...Linus Torvalds1-1/+3
2022-03-22RISC-V: Add sscofpmf extension supportAtish Patra1-5/+217
2022-03-22RISC-V: Add perf platform driver based on SBI PMU extensionAtish Patra4-0/+591
2022-03-22RISC-V: Add a simple platform driver for RISC-V legacy perfAtish Patra3-0/+153
2022-03-22RISC-V: Add a perf core library for pmu driversAtish Patra3-0/+333
2022-03-09perf/marvell: Fix !CONFIG_OF build for CN10K DDR PMU driverWill Deacon1-1/+1
2022-03-08Merge branch 'for-next/perf-m1' into for-next/perfWill Deacon4-0/+594
2022-03-08drivers/perf: Add Apple icestorm/firestorm CPU PMU driverMarc Zyngier3-0/+592
2022-03-08drivers/perf: arm_pmu: Handle 47 bit countersMarc Zyngier1-0/+2
2022-03-08perf/marvell: cn10k DDR perf event core ownershipBharat Bhushan2-2/+55
2022-03-08perf/marvell: cn10k DDR perfmon event overflow handlingBharat Bhushan1-0/+111
2022-03-08perf/marvell: CN10k DDR performance monitor supportBharat Bhushan2-0/+602
2022-03-08perf/arm-cmn: Update watchpoint formatRobin Murphy1-6/+12
2022-03-08perf/arm-cmn: Hide XP PUB events for CMN-600Robin Murphy1-0/+3
2022-02-15perf/smmuv3: Don't cast parameter in bit operationsAndy Shevchenko1-1/+3