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path: root/drivers/phy/cadence
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2021-08-17phy: cadence-torrent: Check PIPE mode PHY status to be ready for operationSwapnil Jakhade1-1/+59
2021-08-17phy: cadence-torrent: Add debug information for PHY configurationSwapnil Jakhade1-4/+32
2021-08-17phy: cadence-torrent: Add separate functions for reusable codeSwapnil Jakhade1-18/+35
2021-08-17phy: cadence-torrent: Add PHY configuration for DP with 100MHz ref clockSwapnil Jakhade1-0/+162
2021-08-17phy: cadence-torrent: Add PHY registers for DP in array formatSwapnil Jakhade1-288/+334
2021-08-17phy: cadence-torrent: Configure PHY registers as a function of input referenc...Swapnil Jakhade1-408/+422
2021-08-17phy: cadence-torrent: Add enum for supported input reference clock frequenciesSwapnil Jakhade1-13/+38
2021-08-17phy: cadence-torrent: Reorder few functions to remove function declarationsSwapnil Jakhade1-619/+588
2021-08-17phy: cadence-torrent: Remove use of CamelCase to fix checkpatch CHECK messageSwapnil Jakhade1-12/+12
2021-05-31phy: cadence: Sierra: Fix error return code in cdns_sierra_phy_probe()Wang Wensheng1-0/+1
2021-03-31phy: cadence-torrent: Add delay for PIPE clock to be stableKishon Vijay Abraham I1-0/+9
2021-03-31phy: cadence-torrent: Explicitly request exclusive reset controlKishon Vijay Abraham I1-1/+1
2021-03-31phy: cadence-torrent: Do not configure SERDES if it's already configuredKishon Vijay Abraham I1-10/+22
2021-03-31phy: cadence-torrent: Group reset APIs and clock APIsKishon Vijay Abraham I1-31/+53
2021-03-31phy: cadence: Sierra: Enable pll_cmnlc and pll_cmnlc1 clocksKishon Vijay Abraham I1-3/+37
2021-03-31phy: cadence: Sierra: Model PLL_CMNLC and PLL_CMNLC1 as clocks (mux clocks)Kishon Vijay Abraham I2-3/+265
2021-03-31phy: cadence: Sierra: Add missing clk_disable_unprepare() in .remove callbackKishon Vijay Abraham I1-0/+3
2021-03-31phy: cadence: Sierra: Add array of input clocks in "struct cdns_sierra_phy"Kishon Vijay Abraham I1-10/+15
2021-03-31phy: cadence-torrent: Use a common header file for Cadence SERDESKishon Vijay Abraham I1-1/+1
2021-03-31phy: cadence: Sierra: Explicitly request exclusive reset controlKishon Vijay Abraham I1-2/+2
2021-03-31phy: cadence: Sierra: Move all reset_control_get*() to a separate functionKishon Vijay Abraham I1-11/+25
2021-03-31phy: cadence: Sierra: Move all clk_get_*() to a separate functionKishon Vijay Abraham I1-22/+35
2021-03-31phy: cadence: Sierra: Create PHY only for "phy" or "link" sub-nodesKishon Vijay Abraham I1-0/+4
2021-03-31phy: cadence: Sierra: Fix PHY power_on sequenceKishon Vijay Abraham I1-1/+6
2021-03-30phy: cadence-torrent: Update PCIe + USB config for correct PLL1 clockSwapnil Jakhade1-16/+31
2021-03-30phy: cadence-torrent: Update SGMII/QSGMII configuration specific to TIKishon Vijay Abraham I1-14/+44
2021-03-30phy: cadence-torrent: Update PCIe + QSGMII config for correct PLL1 clockSwapnil Jakhade1-28/+49
2021-03-30phy: cadence-torrent: Add support to drive refclk outKishon Vijay Abraham I2-3/+186
2021-01-13phy: cadence-torrent: Fix error code in cdns_torrent_phy_probe()Dan Carpenter1-0/+1
2020-11-16phy: cadence: convert to devm_platform_ioremap_resourceChunfeng Yun3-9/+3
2020-09-18phy: cadence-torrent: Add USB + SGMII/QSGMII multilink configurationSwapnil Jakhade1-0/+254
2020-09-18phy: cadence-torrent: Add PCIe + USB multilink configurationSwapnil Jakhade1-0/+216
2020-09-18phy: cadence-torrent: Add single link USB register sequencesSwapnil Jakhade1-1/+259
2020-09-18phy: cadence-torrent: Add single link SGMII/QSGMII register sequencesSwapnil Jakhade1-0/+89
2020-09-18phy: cadence-torrent: Configure PHY_PLL_CFG as part of link_cmn_valsSwapnil Jakhade1-4/+18
2020-09-18phy: cadence-torrent: Add PHY link configuration sequences for single linkSwapnil Jakhade1-0/+44
2020-09-18phy: cadence-torrent: Add clk changes for multilink configurationSwapnil Jakhade1-24/+17
2020-09-18phy: cadence-torrent: Update PHY reset for multilink configurationSwapnil Jakhade1-7/+21
2020-09-18phy: cadence-torrent: Add support for PHY multilink configurationSwapnil Jakhade1-26/+757
2020-09-18phy: cadence-torrent: Add PHY APB reset supportSwapnil Jakhade1-0/+13
2020-09-18phy: cadence-torrent: Check cmn_ready assertion during PHY power onSwapnil Jakhade1-1/+30
2020-09-18phy: cadence-torrent: Add single link PCIe supportSwapnil Jakhade1-30/+266
2020-09-18phy: cadence-torrent: Check total lane count for all subnodes is within limitSwapnil Jakhade1-4/+15
2020-09-18phy: cadence-torrent: Add separate regmap functions for torrent and DPSwapnil Jakhade1-33/+66
2020-09-18phy: cadence-torrent: Enable support for multiple subnodesSwapnil Jakhade1-15/+0
2020-09-18phy: cadence-torrent: Use devm_platform_ioremap_resource() to get reg addressesSwapnil Jakhade1-6/+2
2020-09-18phy: cadence-torrent: Use of_device_get_match_data() to get driver dataSwapnil Jakhade1-8/+5
2020-09-16phy: cadence: torrent: Constify regmap_config structsRikard Falkeborn1-6/+6
2020-09-16phy: cadence: salvo: Constify cdns_nxp_sequence_pairRikard Falkeborn1-3/+3
2020-09-16phy: cadence: Sierra: Constify static structsRikard Falkeborn1-12/+12