| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2023-02-10 | phy: qcom-qmp: pcs-pcie: Add v6 register offsets | Abel Vesa | 1 | -0/+15 | |
| The new SM8550 SoC bumps up the HW version of QMP phy to v6 for USB, UFS and PCIE g3x2. Add the new PCS PCIE specific offsets in a dedicated header file. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230208180020.2761766-5-abel.vesa@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org> | |||||
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