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path: root/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-txrx-v6.h
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2023-12-21phy: qcom-qmp: qserdes-com: Add some more v6 register offsetsAbel Vesa1-0/+1
Add some missing V6 registers offsets that are needed by the new Snapdragon X Elite (X1E80100) platform. Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Link: https://lore.kernel.org/r/20231122-phy-qualcomm-v6-v6-20-v7-new-offsets-v3-1-dfd1c375ef61@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-12phy: qcom: qmp-combo: reuse register layouts for some more registersDmitry Baryshkov1-0/+2
Use register layout for TX_HIGHZ_DRVR_EN and TX_TRANSCEIVER_BIAS_EN registers. This will allow us to unify qmp_v[456]_configure_dp_phy() functions in the next commit. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230621153317.1025914-5-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-12phy: qcom: qmp-combo: reuse register layouts for even more registersDmitry Baryshkov1-0/+3
Instead of passing additional registers to qmp_combo_configure_dp_swing(), reuse qphy_reg_layout and add those registers to register layout maps. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230621153317.1025914-4-dmitry.baryshkov@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-02-02phy: qcom-qmp: qserdes-txrx: Add v6 register offsetsAbel Vesa1-0/+77
The new SM8550 SoC bumps up the HW version of QMP phy to v6 for USB, UFS and PCIE g3x2. Add the new qserdes TX RX offsets in a dedicated header file. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20230117224148.1914627-4-abel.vesa@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>