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2024-05-04phy: samsung-ufs: ufs: exit on first reported errorPeter Griffin1-2/+8
To preserve the err value, exit the loop immediately if an error is returned. Fixes: f2c6d0fa197a ("phy: samsung-ufs: use exynos_get_pmu_regmap_by_phandle() to obtain PMU regmap") Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20240426104129.2211949-3-peter.griffin@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-05-04phy: samsung-ufs: ufs: remove superfluous mfd/syscon.h headerPeter Griffin1-1/+0
mfd/syscon.h header is no longer required since the update to exynos_get_pmu_regmap_by_phandle() api. Fixes: f2c6d0fa197a ("phy: samsung-ufs: use exynos_get_pmu_regmap_by_phandle() to obtain PMU regmap") Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Link: https://lore.kernel.org/r/20240426104129.2211949-2-peter.griffin@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-04-06phy: samsung-ufs: ufs: Add support for gs101 UFS phy tuningPeter Griffin4-0/+187
Add the m-phy tuning values for gs101 UFS phy and SoC callbacks gs101_phy_wait_for_calibration() and gs101_phy_wait_for_cdr_lock(). Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240404122559.898930-12-peter.griffin@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-04-06phy: samsung-ufs: ufs: Add SoC callbacks for calibration and clk data recoveryPeter Griffin5-3/+18
Some SoCs like gs101 don't fit in well with the existing pll lock and clock data recovery (CDR) callback used by existing exynos platforms. Allow SoCs to specifify and implement their own calibration and CDR functions that can be called by the generic samsung phy code. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240404122559.898930-11-peter.griffin@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-04-06phy: samsung-ufs: use exynos_get_pmu_regmap_by_phandle() to obtain PMU regmapPeter Griffin1-2/+3
This allows us to obtain a PMU regmap that is created by the exynos-pmu driver. Platforms such as gs101 require exynos-pmu created regmap to issue SMC calls for PMU register accesses. Existing platforms still get a MMIO regmap as before. Signed-off-by: Peter Griffin <peter.griffin@linaro.org> Reviewed-by: André Draszik <andre.draszik@linaro.org> Link: https://lore.kernel.org/r/20240404122559.898930-10-peter.griffin@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2024-02-23phy: constify of_phandle_args in xlateKrzysztof Kozlowski3-3/+3
The xlate callbacks are supposed to translate of_phandle_args to proper provider without modifying the of_phandle_args. Make the argument pointer to const for code safety and readability. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Thierry Reding <treding@nvidia.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Florian Fainelli <florian.fainelli@broadcom.com> #Broadcom Link: https://lore.kernel.org/r/20240217093937.58234-1-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-08-22phy: exynos5-usbdrd: Add Exynos850 supportSam Protsenko1-0/+169
Implement Exynos850 USB 2.0 DRD PHY controller support. Exynos850 has quite a different PHY controller than Exynos5 compatible controllers, but it's still possible to implement it on top of existing exynos5-usbdrd driver infrastructure. Only UTMI+ (USB 2.0) PHY interface is implemented, as Exynos850 doesn't support USB 3.0. Only two clocks are used for this controller: - phy: bus clock, used for PHY registers access - ref: PHY reference clock (OSCCLK) Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230819031731.22618-7-semen.protsenko@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-08-22phy: exynos5-usbdrd: Add 26MHz ref clk supportSam Protsenko1-0/+4
Modern Exynos chips (like Exynos850) might have 26 MHz OSCCLK external clock, which is also used as a PHY reference clock. For some USB PHY controllers (e.g USB DRD PHY block on Exynos850) there is no need to set the refclk frequency at all (and corresponding bits in CLKRSTCTRL[7:5] are marked RESERVED), so that value won't be set in the driver. But even in that case, 26 MHz support still has to be added, otherwise exynos5_rate_to_clk() fails, which leads in turn to probe error. Add the correct value for 26MHz refclk to make it possible to add support for new Exynos USB DRD PHY controllers. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230819031731.22618-6-semen.protsenko@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-08-22phy: exynos5-usbdrd: Make it possible to pass custom phy opsSam Protsenko1-2/+7
Provide a way to use different PHY ops for different chips. Right now all chips are using exynos5_usbdrd_phy_ops, but it won't always be the case. For example, Exynos850 has very different USB PHY block, so there will be another PHY ops implementation for that chip. No functional change. Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230819031731.22618-5-semen.protsenko@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-07-17phy: Explicitly include correct DT includesRob Herring4-8/+1
The DT of_device.h and of_platform.h date back to the separate of_platform_bus_type before it as merged into the regular platform bus. As part of that merge prepping Arm DT support 13 years ago, they "temporarily" include each other. They also include platform_device.h and of.h. As a result, there's a pretty much random mix of those include files used throughout the tree. In order to detangle these headers and replace the implicit includes with struct declarations, users need to explicitly include the correct includes. Signed-off-by: Rob Herring <robh@kernel.org> Acked-by: Marc Kleine-Budde <mkl@pengutronix.de> # for drivers/phy/phy-can-transceiver.c Acked-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20230714174841.4061919-1-robh@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-05-16phy: Revert "phy: Remove SOC_EXYNOS4212 dep. from PHY_EXYNOS4X12_USB"Artur Weber1-1/+1
Support for the Exynos4212 SoC was originally dropped as there were no boards using it. We will be adding a device that uses it, so add it back. This reverts commit fee7e1d50c6e6da1d99035181ba5a5c88f5bb526. Signed-off-by: Artur Weber <aweber.kernel@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20230501195525.6268-9-aweber.kernel@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2023-02-03phy: samsung,mipi-video-phy: deprecate syscon phandleKrzysztof Kozlowski1-2/+5
The MIPI phy is actually part of the Power Management Unit system controller, thus it should be its child, instead of sibling node with syscon phandle. Acked-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20230127194057.186458-6-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2023-02-03phy: samsung,dp-video-phy: deprecate syscon phandleKrzysztof Kozlowski1-2/+5
The DisplayPort phy is actually part of the Power Management Unit system controller, thus it should be its child, instead of sibling node with syscon phandle. Acked-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20230127194057.186458-5-krzysztof.kozlowski@linaro.org Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
2022-08-05Merge tag 'pci-v5.20-changes' of ↵Linus Torvalds1-16/+9
git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci Pull pci updates from Bjorn Helgaas: "Enumeration: - Consolidate duplicated 'next function' scanning and extend to allow 'isolated functions' on s390, similar to existing hypervisors (Niklas Schnelle) Resource management: - Implement pci_iobar_pfn() for sparc, which allows us to remove the sparc-specific pci_mmap_page_range() and pci_mmap_resource_range(). This removes the ability to map the entire PCI I/O space using /proc/bus/pci, but we believe that's already been broken since v2.6.28 (Arnd Bergmann) - Move common PCI definitions to asm-generic/pci.h and rework others to be be more specific and more encapsulated in arches that need them (Stafford Horne) Power management: - Convert drivers to new *_PM_OPS macros to avoid need for '#ifdef CONFIG_PM_SLEEP' or '__maybe_unused' (Bjorn Helgaas) Virtualization: - Add ACS quirk for Broadcom BCM5750x multifunction NICs that isolate the functions but don't advertise an ACS capability (Pavan Chebbi) Error handling: - Clear PCI Status register during enumeration in case firmware left errors logged (Kai-Heng Feng) - When we have native control of AER, enable error reporting for all devices that support AER. Previously only a few drivers enabled this (Stefan Roese) - Keep AER error reporting enabled for switches. Previously we enabled this during enumeration but immediately disabled it (Stefan Roese) - Iterate over error counters instead of error strings to avoid printing junk in AER sysfs counters (Mohamed Khalfella) ASPM: - Remove pcie_aspm_pm_state_change() so ASPM config changes, e.g., via sysfs, are not lost across power state changes (Kai-Heng Feng) Endpoint framework: - Don't stop an EPC when unbinding an EPF from it (Shunsuke Mie) Endpoint embedded DMA controller driver: - Simplify and clean up support for the DesignWare embedded DMA (eDMA) controller (Frank Li, Serge Semin) Broadcom STB PCIe controller driver: - Avoid config space accesses when link is down because we can't recover from the CPU aborts these cause (Jim Quinlan) - Look for power regulators described under Root Ports in DT and enable them before scanning the secondary bus (Jim Quinlan) - Disable/enable regulators in suspend/resume (Jim Quinlan) Freescale i.MX6 PCIe controller driver: - Simplify and clean up clock and PHY management (Richard Zhu) - Disable/enable regulators in suspend/resume (Richard Zhu) - Set PCIE_DBI_RO_WR_EN before writing DBI registers (Richard Zhu) - Allow speeds faster than Gen2 (Richard Zhu) - Make link being down a non-fatal error so controller probe doesn't fail if there are no Endpoints connected (Richard Zhu) Loongson PCIe controller driver: - Add ACPI and MCFG support for Loongson LS7A (Huacai Chen) - Avoid config reads to non-existent LS2K/LS7A devices because a hardware defect causes machine hangs (Huacai Chen) - Work around LS7A integrated devices that report incorrect Interrupt Pin values (Jianmin Lv) Marvell Aardvark PCIe controller driver: - Add support for AER and Slot capability on emulated bridge (Pali Rohár) MediaTek PCIe controller driver: - Add Airoha EN7532 to DT binding (John Crispin) - Allow building of driver for ARCH_AIROHA (Felix Fietkau) MediaTek PCIe Gen3 controller driver: - Print decoded LTSSM state when the link doesn't come up (Jianjun Wang) NVIDIA Tegra194 PCIe controller driver: - Convert DT binding to json-schema (Vidya Sagar) - Add DT bindings and driver support for Tegra234 Root Port and Endpoint mode (Vidya Sagar) - Fix some Root Port interrupt handling issues (Vidya Sagar) - Set default Max Payload Size to 256 bytes (Vidya Sagar) - Fix Data Link Feature capability programming (Vidya Sagar) - Extend Endpoint mode support to devices beyond Controller-5 (Vidya Sagar) Qualcomm PCIe controller driver: - Rework clock, reset, PHY power-on ordering to avoid hangs and improve consistency (Robert Marko, Christian Marangi) - Move pipe_clk handling to PHY drivers (Dmitry Baryshkov) - Add IPQ60xx support (Selvam Sathappan Periakaruppan) - Allow ASPM L1 and substates for 2.7.0 (Krishna chaitanya chundru) - Add support for more than 32 MSI interrupts (Dmitry Baryshkov) Renesas R-Car PCIe controller driver: - Convert DT binding to json-schema (Herve Codina) - Add Renesas RZ/N1D (R9A06G032) to rcar-gen2 DT binding and driver (Herve Codina) Samsung Exynos PCIe controller driver: - Fix phy-exynos-pcie driver so it follows the 'phy_init() before phy_power_on()' PHY programming model (Marek Szyprowski) Synopsys DesignWare PCIe controller driver: - Simplify and clean up the DWC core extensively (Serge Semin) - Fix an issue with programming the ATU for regions that cross a 4GB boundary (Serge Semin) - Enable the CDM check if 'snps,enable-cdm-check' exists; previously we skipped it if 'num-lanes' was absent (Serge Semin) - Allocate a 32-bit DMA-able page to be MSI target instead of using a driver data structure that may not be addressable with 32-bit address (Will McVicker) - Add DWC core support for more than 32 MSI interrupts (Dmitry Baryshkov) Xilinx Versal CPM PCIe controller driver: - Add DT binding and driver support for Versal CPM5 Gen5 Root Port (Bharat Kumar Gogada)" * tag 'pci-v5.20-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (150 commits) PCI: imx6: Support more than Gen2 speed link mode PCI: imx6: Set PCIE_DBI_RO_WR_EN before writing DBI registers PCI: imx6: Reformat suspend callback to keep symmetric with resume PCI: imx6: Move the imx6_pcie_ltssm_disable() earlier PCI: imx6: Disable clocks in reverse order of enable PCI: imx6: Do not hide PHY driver callbacks and refine the error handling PCI: imx6: Reduce resume time by only starting link if it was up before suspend PCI: imx6: Mark the link down as non-fatal error PCI: imx6: Move regulator enable out of imx6_pcie_deassert_core_reset() PCI: imx6: Turn off regulator when system is in suspend mode PCI: imx6: Call host init function directly in resume PCI: imx6: Disable i.MX6QDL clock when disabling ref clocks PCI: imx6: Propagate .host_init() errors to caller PCI: imx6: Collect clock enables in imx6_pcie_clk_enable() PCI: imx6: Factor out ref clock disable to match enable PCI: imx6: Move imx6_pcie_clk_disable() earlier PCI: imx6: Move imx6_pcie_enable_ref_clk() earlier PCI: imx6: Move PHY management functions together PCI: imx6: Move imx6_pcie_grp_offset(), imx6_pcie_configure_type() earlier PCI: imx6: Convert to NOIRQ_SYSTEM_SLEEP_PM_OPS() ...
2022-08-01phy: samsung: phy-exynos-pcie: sanitize init/power_on callbacksMarek Szyprowski1-16/+9
The exynos-pcie driver called phy_power_on() before phy_init() for some historical reasons. However the generic PHY framework assumes that the proper sequence is to call phy_init() first, then phy_power_on(). The operations done by both functions should be considered as one action and as such they are called by the exynos-pcie driver (without doing anything between them). The initialization is just a sequence of register writes, which cannot be altered without breaking the hardware operation. To match the generic PHY framework requirement, simply move all register writes to the phy_init()/phy_exit() and drop power_on()/power_off() callbacks. This way the driver will also work with the old (incorrect) PHY initialization call sequence. Link: https://lore.kernel.org/r/20220628220409.26545-1-m.szyprowski@samsung.com Reported-by: Bjorn Helgaas <helgaas@kernel.org> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Chanho Park <chanho61.park@samsung.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-By: Vinod Koul <vkoul@kernel.org>
2022-07-08phy: samsung-ufs: ufs: change phy on/off controlChanho Park1-13/+19
The sequence of controlling ufs phy block should be below: 1) Power On - Turn off pmu isolation - Clock enable 2) Power Off - Clock disable - Turn on pmu isolation Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220706020255.151177-3-chanho61.park@samsung.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-07-08phy: samsung-ufs: convert phy clk usage to clk_bulk APIChanho Park5-88/+42
Instead of using separated clock manipulation, this converts the phy clock usage to be clk_bulk APIs. By using this, we can completely remove has_symbol_clk check and symbol clk variables. Furthermore, clk_get should be moved to probe because there is no need to get them in the phy_init callback. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220706020255.151177-2-chanho61.park@samsung.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-17phy: samsung-ufs: add support for FSD ufs phy driverAlim Akhtar4-0/+63
Adds support for Tesla Full Self-Driving (FSD) ufs phy driver. This SoC has different cdr lock status offset. Signed-off-by: Bharat Uppal <bharat.uppal@samsung.com> Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220610104119.66401-4-alim.akhtar@samsung.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-17phy: samsung-ufs: move cdr offset to drvdataAlim Akhtar4-2/+9
Move CDR lock offset to drv data so that it can be extended for other SoCs which are having CDR lock at different register offset. Signed-off-by: Bharat Uppal <bharat.uppal@samsung.com> Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220610104119.66401-3-alim.akhtar@samsung.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-08phy: samsung: exynosautov9-ufs: correct TSRV register configurationsChanho Park1-9/+9
For exynos auto v9's UFS MPHY, We should use 0x50 offset of TSRV register configurations. So, it must be s/PHY_TRSV_REG_CFG/PHY_TRSV_REG_CFG_AUTOV9/g Fixes: d64519249e1d ("phy: samsung-ufs: support exynosauto ufs phy driver") Signed-off-by: Chanho Park <chanho61.park@samsung.com> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220603050536.61957-1-chanho61.park@samsung.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-08phy: samsung: ufs: support secondary ufs phyChanho Park1-0/+5
To support secondary ufs phy device, we need to get an offset for phy isolation from the syscon DT node. If the first index argument of the node is existing, we can read the offset value and set it as isol->offset. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220607072907.127000-6-chanho61.park@samsung.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-08phy: samsung: ufs: remove drvdata from struct samsung_ufs_phyChanho Park2-12/+16
To change an offset of pmu_isol, we need to store its data instead of having drvdata's pointer. The definition of the pmu_isol structure should be extracted from samsung_ufs_phy_drvdata and rename the name with samsung_ufs_phy_ prefix. Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220607072907.127000-5-chanho61.park@samsung.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-08phy: samsung: ufs: constify samsung_ufs_phy_cfgChanho Park2-3/+3
Put const qualifier of samsung_ufs_phy_cfg pointer because they will not be changed from drvdata. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220607072907.127000-4-chanho61.park@samsung.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-06-08phy: samsung: ufs: rename cfg to cfgs for clarificationChanho Park4-6/+6
Rename **cfg to **cfgs to clarify the naming. Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220607072907.127000-3-chanho61.park@samsung.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11phy: samsung: exynos5250-sata: fix missing device put in probe error pathsKrzysztof Kozlowski1-6/+14
The actions of of_find_i2c_device_by_node() in probe function should be reversed in error paths by putting the reference to obtained device. Fixes: bcff4cba41bc ("PHY: Exynos: Add Exynos5250 SATA PHY driver") Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20220407091857.230386-2-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2022-04-11phy: samsung: Fix missing of_node_put() in exynos_sata_phy_probeMiaoqian Lin1-0/+1
The device_node pointer is returned by of_parse_phandle() with refcount incremented. We should use of_node_put() on it when done. Fixes: bcff4cba41bc ("PHY: Exynos: Add Exynos5250 SATA PHY driver") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20220407091857.230386-1-krzysztof.kozlowski@linaro.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-10-01phy: samsung: unify naming and describe driver in KConfigKrzysztof Kozlowski1-8/+8
We use everywhere "Samsung" and "Exynos", not the uppercase versions. Describe better which driver applies to which SoC, to make configuring kernel for Samsung SoC easier. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20210924132658.109814-1-krzysztof.kozlowski@canonical.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-07-20phy: samsung-ufs: support exynosauto ufs phy driverChanho Park4-2/+77
This patch adds to support phy-exynosautov9-ufs driver for ExynosAuto v9 series SoCs. The patch adds "samsung,exynosautov9-ufs-phy" compatible. Unlike previous exynos ufs phy, the chip uses 0x50 offset as PHY_TRSV_REG_CFG_OFFSET. Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20210709094524.110193-3-chanho61.park@samsung.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2021-07-20phy: samsung-ufs: move phy-exynos7-ufs headerChanho Park3-8/+9
Instead of using exynos7 ufs definition in phy-exynos7-ufs.h, we should put it into phy-exynos7-ufs.c to be included different objects or units. Suggested-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Signed-off-by: Chanho Park <chanho61.park@samsung.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> Link: https://lore.kernel.org/r/20210709094524.110193-2-chanho61.park@samsung.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-12-02phy: samsung: Merge Kconfig for Exynos5420 and Exynos5250Marek Szyprowski2-8/+1
Exynos5420 variant of USB2 PHY is handled by the same code as the Exynos5250 one. Introducing a separate Kconfig symbol for it was an over-engineering, which turned out to cause build break for certain configurations: ERROR: modpost: "exynos5420_usb2_phy_config" [drivers/phy/samsung/phy-exynos-usb2.ko] undefined! Fix this by removing PHY_EXYNOS5420_USB2 symbol and using PHY_EXYNOS5250_USB2 also for Exynos5420 SoCs. Reported-by: Markus Reichl <m.reichl@fivetechno.de> Fixes: 81b534f7e9b2 ("phy: samsung: Add support for the Exynos5420 variant of the USB2 PHY") Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Link: https://lore.kernel.org/r/20201202064759.24300-1-m.szyprowski@samsung.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-11-30phy: samsung: Add support for the Exynos5420 variant of the USB2 PHYMarek Szyprowski4-15/+47
Exynos5420 differs a bit from Exynos5250 in USB2 PHY related registers in the PMU region. Add a variant for the Exynos5420 case. Till now, USB2 PHY worked only because the bootloader enabled the PHY, but then driver messed USB 3.0 DRD related registers during the suspend/resume cycle. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20201120085637.7299-2-m.szyprowski@samsung.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-11-20phy: samsung: phy-exynos-pcie: fix typo 'tunning'Vinod Koul1-1/+1
Fix the typo s/tunning/tuning Fixes: 496db029142f ("phy: samsung: phy-exynos-pcie: rework driver to support Exynos5433 PCIe PHY") Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-11-20phy: samsung: phy-exynos-pcie: rework driver to support Exynos5433 PCIe PHYJaehoon Chung1-189/+112
Exynos5440 SoC support has been dropped since commit 8c83315da1cf ("ARM: dts: exynos: Remove Exynos5440"). Rework this driver to support PCIe PHY variant found in the Exynos5433 SoCs. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> [mszyprow: reworked the driver to support only Exynos5433 variant, rebased onto current kernel code, rewrote commit message] Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Reviewed-by: Jingoo Han <jingoohan1@gmail.com> Link: https://lore.kernel.org/r/20201120102627.14450-1-m.szyprowski@samsung.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-11-16phy: samsung: convert to devm_platform_ioremap_resourceChunfeng Yun4-15/+5
Use devm_platform_ioremap_resource to simplify code Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/1604642930-29019-14-git-send-email-chunfeng.yun@mediatek.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-08-31phy: samsung-ufs: Constify samsung_ufs_phy_opsRikard Falkeborn1-1/+1
The only usage is to pass its address to devm_phy_create() which takes a const pointer. Make it const to allow the compiler to put it in read-only memory. Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Link: https://lore.kernel.org/r/20200823220025.17588-8-rikard.falkeborn@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-08-23phy: samsung: Use readl_poll_timeout functionAnand Moon1-27/+12
Instead of a busy waiting while loop using udelay use readl_poll_timeout function to check the condition is met or timeout occurs in crport_handshake function. readl_poll_timeout is called in non atomic context so it safe to sleep until the condition is met. Signed-off-by: Anand Moon <linux.amoon@gmail.com> Link: https://lore.kernel.org/r/20200720173502.542-1-linux.amoon@gmail.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-23Merge tag 'phy-for-5.9' of ↵Greg Kroah-Hartman10-17/+615
git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy into char-misc-next Vinod writes: phy for 5.9 - New PHY Drivers: - Samsung UFS - Qcom USB DWC for ipq806x - Xilinx ZynqMP Gigabit Transceiver - Qcom USB QMP for IPQ8074 - BCM63xx USBH - Removed: - Qcom ufs qmp phy driver - Updates: - Support for Qcom SM8250 QMP V4 USB3 UNIPHY - qcom-snps runtime pm support - Cleanup of W=1 warns in the subsystem * tag 'phy-for-5.9' of git://git.kernel.org/pub/scm/linux/kernel/git/phy/linux-phy: (46 commits) phy: qualcomm: fix setting of tx_deamp_3_5db when device property read fails phy: bcm63xx-usbh: Add BCM63xx USBH driver dt-bindings: phy: add bcm63xx-usbh bindings phy: armada-38x: fix NETA lockup when repeatedly switching speeds dt: update Marvell Armada 38x COMPHY binding phy: samsung-ufs: Fix IS_ERR argument dt-bindings: phy: renesas,usb3-phy: Add r8a774e1 support dt-bindings: phy: renesas,usb2-phy: Add r8a774e1 support phy: renesas: rcar-gen3-usb2: exit if request_irq() failed phy: renesas: rcar-gen3-usb2: move irq registration to init devicetree: bindings: phy: Document ipq806x dwc3 qcom phy phy: qualcomm: add qcom ipq806x dwc usb phy driver phy: samsung-ufs: add UFS PHY driver for samsung SoC dt-bindings: phy: Document Samsung UFS PHY bindings phy: sun4i-usb: explicitly include gpio/consumer.h phy: stm32: use NULL instead of zero phy: exynos5-usbdrd: use correct format for structure description phy: rockchip-typec: use correct format for structure description phy: xgene: remove unsigned integer comparison with less than zero phy: mapphone-mdm6600: Add missing description for some structure fields ...
2020-07-21phy: samsung-ufs: Fix IS_ERR argumentGustavo A. R. Silva1-1/+1
Fix IS_ERR argument in samsung_ufs_phy_symbol_clk_init(). The proper argument to be passed to IS_ERR() is phy->rx1_symbol_clk. This bug was detected with the help of Coccinelle. Fixes: bca21e930451 ("phy: samsung-ufs: add UFS PHY driver for samsung SoC") Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by: Alim Akhtar <alim.akhtar@samsung.com> Link: https://lore.kernel.org/r/20200720132718.GA13413@embeddedor Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-17phy: samsung-ufs: add UFS PHY driver for samsung SoCAlim Akhtar5-0/+596
This patch introduces Samsung UFS PHY driver. This driver supports to deal with phy calibration and power control according to UFS host driver's behavior. [Robot: -Wmissing-prototypes and -Wsometimes-uninitialized] Reported-by: kernel test robot <lkp@intel.com> Reviewed-by: Kiwoong Kim <kwmad.kim@samsung.com> Signed-off-by: Seungwon Jeon <essuuj@gmail.com> Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Cc: Kishon Vijay Abraham I <kishon@ti.com> Cc: Vinod Koul <vkoul@kernel.org> Tested-by: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com> Link: https://lore.kernel.org/r/20200716192217.35740-2-alim.akhtar@samsung.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-13phy: exynos5-usbdrd: use correct format for structure descriptionVinod Koul1-3/+3
We get warning with W=1 build: drivers/phy/samsung/phy-exynos5-usbdrd.c:211: warning: Function parameter or member 'phys' not described in 'exynos5_usbdrd_phy' drivers/phy/samsung/phy-exynos5-usbdrd.c:211: warning: Function parameter or member 'vbus' not described in 'exynos5_usbdrd_phy' drivers/phy/samsung/phy-exynos5-usbdrd.c:211: warning: Function parameter or member 'vbus_boost' not described in 'exynos5_usbdrd_phy' These members are provided with description but format is not quite right resulting in above warnings Acked-by: Marek Szyprowski <m.szyprowski@samsung.com> Link: https://lore.kernel.org/r/20200708132809.265967-5-vkoul@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-07-13phy: exynos5-usbdrd: Calibrating makes sense only for USB2.0 PHYMarek Szyprowski1-1/+3
PHY calibration is needed only for USB2.0 (UTMI) PHY, so skip calling calibration code when phy_calibrate() is called for USB3.0 (PIPE3) PHY. Fixes: d8c80bb3b55b ("phy: exynos5-usbdrd: Calibrate LOS levels for exynos5420/5800") Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200708133800.3336-1-m.szyprowski@samsung.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-24phy: exynos: Rename Exynos to lowercaseKrzysztof Kozlowski6-13/+13
Fix up inconsistent usage of upper and lowercase letters in "Exynos" name. "EXYNOS" is not an abbreviation but a regular trademarked name. Therefore it should be written with lowercase letters starting with capital letter. The lowercase "Exynos" name is promoted by its manufacturer Samsung Electronics Co., Ltd., in advertisement materials and on website. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200617152803.17941-1-krzk@kernel.org Signed-off-by: Vinod Koul <vkoul@kernel.org>
2020-06-16phy: samsung: Replace zero-length array with flexible-arrayGustavo A. R. Silva1-1/+1
There is a regular need in the kernel to provide a way to declare having a dynamically sized set of trailing elements in a structure. Kernel code should always use “flexible array members”[1] for these cases. The older style of one-element or zero-length arrays should no longer be used[2]. [1] https://en.wikipedia.org/wiki/Flexible_array_member [2] https://github.com/KSPP/linux/issues/21 Signed-off-by: Gustavo A. R. Silva <gustavoars@kernel.org>
2020-05-13phy: samsung: s5pv210-usb2: Add delay after resetJonathan Bakker1-0/+4
The USB phy takes some time to reset, so make sure we give it to it. The delay length was taken from the 4x12 phy driver. This manifested in issues with the DWC2 driver since commit fe369e1826b3 ("usb: dwc2: Make dwc2_readl/writel functions endianness-agnostic.") where the endianness check would read the DWC ID as 0 due to the phy still resetting, resulting in the wrong endian mode being chosen. Signed-off-by: Jonathan Bakker <xc-racer2@live.ca> Link: https://lore.kernel.org/r/BN6PR04MB06605D52502816E500683553A3D10@BN6PR04MB0660.namprd04.prod.outlook.com Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2020-01-29Merge tag 'usb-5.6-rc1' of ↵Linus Torvalds1-3/+3
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb Pull USB/Thunderbolt/PHY driver updates from Greg KH: "Here is the big USB and Thunderbolt and PHY driver updates for 5.6-rc1. With the advent of USB4, "Thunderbolt" has really become USB4, so the renaming of the Kconfig option and starting to share subsystem code has begun, hence both subsystems coming in through the same tree here. PHY driver updates also touched USB drivers, so that is coming in through here as well. Major stuff included in here are: - USB 4 initial support added (i.e. Thunderbolt) - musb driver updates - USB gadget driver updates - PHY driver updates - USB PHY driver updates - lots of USB serial stuff fixed up - USB typec updates - USB-IP fixes - lots of other smaller USB driver updates All of these have been in linux-next for a while now (the usb-serial tree is already tested in linux-next on its own before merged into here), with no reported issues" [ Removed an incorrect compile test enablement for PHY_EXYNOS5250_SATA that causes configuration warnings - Linus ] * tag 'usb-5.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (207 commits) Doc: ABI: add usb charger uevent usb: phy: show USB charger type for user usb: cdns3: fix spelling mistake and rework grammar in text usb: phy: phy-gpio-vbus-usb: Convert to GPIO descriptors USB: serial: cyberjack: fix spelling mistake "To" -> "Too" USB: serial: ir-usb: simplify endpoint check USB: serial: ir-usb: make set_termios synchronous USB: serial: ir-usb: fix IrLAP framing USB: serial: ir-usb: fix link-speed handling USB: serial: ir-usb: add missing endpoint sanity check usb: typec: fusb302: fix "op-sink-microwatt" default that was in mW usb: typec: wcove: fix "op-sink-microwatt" default that was in mW usb: dwc3: pci: add ID for the Intel Comet Lake -V variant usb: typec: tcpci: mask event interrupts when remove driver usb: host: xhci-tegra: set MODULE_FIRMWARE for tegra186 usb: chipidea: add inline for ci_hdrc_host_driver_init if host is not defined usb: chipidea: handle single role for usb role class usb: musb: fix spelling mistake: "periperal" -> "peripheral" phy: ti: j721e-wiz: Fix build error without CONFIG_OF_ADDRESS USB: usbfs: Always unlink URBs in reverse order ...
2020-01-06phy: Enable compile testing for some of driversKrzysztof Kozlowski1-4/+4
Some of the phy drivers can be compile tested to increase build coverage. Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Link: https://lore.kernel.org/r/20200103164710.4829-2-krzk@kernel.org Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-08-23phy: samsung: disable bind/unbind platform driver featureMarek Szyprowski6-0/+6
Samsung PHY drivers control the power to the SoC core components needed by their client devices (USB HCDs, SATA, camera ISP bridge, DP encoder) to properly operate. Disabling PHYs in runtime usually causes the client device to crash with external abort exception or similar issue due to lack of API to notify clients about PHY removal. This patch removes the possiblity to unbind Samsung Exynos PHY drivers in runtime. Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-07-01Merge tag 'phy-for-5.3' of ↵Greg Kroah-Hartman1-3/+2
git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy into usb-next phy: for 5.3 *) Add a new PHY driver for Qualcomm PCIe2 PHY *) Add a new PHY driver for Mixel DPHY present in i.MX8 *) Fix Qualcomm QMP UFS PHY driver from incorrectly reporting that PHY enable failed *) Fix _BUG_ on Amlogic G12A USB3 + PCIE Combo PHY Driver due to calling a sleeping function from invalid context *) Fix WARN_ON dump on rcar-gen3-usb2 PHY driver caused due to imbalance powered flag *) Fix .cocci and sparse warnings Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> * tag 'phy-for-5.3' of git://git.kernel.org/pub/scm/linux/kernel/git/kishon/linux-phy: phy: qcom-qmp: Raise qcom_qmp_phy_enable() polling delay phy: meson-g12a-usb3-pcie: disable locking for cr_regmap phy: Add driver for mixel mipi dphy found on NXP's i.MX8 SoCs dt-bindings: phy: Add documentation for mixel dphy dt-bindings: phy-pxa-usb: add bindings phy: renesas: rcar-gen3-usb2: fix imbalance powered flag phy: qcom-qmp: Drop useless msm8998_pciephy_cfg setting phy: qcom-qmp: Correct READY_STATUS poll break condition phy: ti: am654-serdes: Make serdes_am654_xlate() static phy: usb: phy-brcm-usb: Fix platform_no_drv_owner.cocci warnings phy: samsung: Use struct_size() in devm_kzalloc() phy: qcom: Add Qualcomm PCIe2 PHY driver dt-bindings: phy: Add binding for Qualcomm PCIe2 PHY
2019-06-20phy: samsung: Use struct_size() in devm_kzalloc()Gustavo A. R. Silva1-3/+2
One of the more common cases of allocation size calculations is finding the size of a structure that has a zero-sized array at the end, along with memory for some number of elements for that array. For example: struct samsung_usb2_phy_driver { ... struct samsung_usb2_phy_instance instances[0]; }; instance = devm_kzalloc(dev, sizeof(struct samsung_usb2_phy_driver) + count * sizeof(struct samsung_usb2_phy_instance), GFP_KERNEL); Instead of leaving these open-coded and prone to type mistakes, we can now use the new struct_size() helper: instance = devm_kzalloc(dev, struct_size(instance, instances, count), GFP_KERNEL); This code was detected with the help of Coccinelle. Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2019-06-19treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500Thomas Gleixner11-44/+11
Based on 2 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 as published by the free software foundation # extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 4122 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Enrico Weigelt <info@metux.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>