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path: root/drivers/phy/socionext
AgeCommit message (Expand)AuthorFilesLines
2021-12-24phy: uniphier-usb3ss: fix unintended writing zeros to PHY registerRyuta NAKANISHI1-4/+6
2021-11-23phy: uniphier-ahci: Add support for Pro4 SoCKunihiko Hayashi2-5/+198
2021-11-23phy: uniphier-pcie: Add dual-phy support for NX1 SoCKunihiko Hayashi1-14/+34
2021-11-23phy: uniphier-pcie: Set VCOPLL clamp mode in PHY registerKunihiko Hayashi1-0/+5
2021-11-23phy: uniphier-pcie: Add compatible string and SoC-dependent data for NX1 SoCKunihiko Hayashi1-0/+19
2021-11-23phy: uniphier-usb3: Add compatible string for NX1 SoCKunihiko Hayashi2-0/+8
2021-06-21phy: uniphier-pcie: Fix updating phy parametersKunihiko Hayashi1-4/+7
2020-08-31phy: socionext: Add UniPhier AHCI PHY driver supportKunihiko Hayashi3-0/+332
2020-03-20phy: uniphier-pcie: Add SoC-dependent phy-mode function supportKunihiko Hayashi1-7/+10
2020-03-20phy: uniphier-pcie: Add legacy SoC support for Pro5Kunihiko Hayashi1-11/+72
2020-03-20phy: uniphier-usb3hs: Change Rx sync mode to avoid communication failureKunihiko Hayashi1-4/+16
2020-03-20phy: uniphier-usb3hs: Add legacy SoC support for Pro5Kunihiko Hayashi1-15/+53
2020-03-20phy: uniphier-usb3ss: Add Pro5 supportKunihiko Hayashi1-0/+4
2020-03-20phy: socionext: Use devm_platform_ioremap_resource()Kunihiko Hayashi3-9/+3
2019-05-21treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner1-0/+1
2019-04-17phy: socionext: get optional clock by devm_clk_get_optional()Chunfeng Yun2-14/+6
2018-11-12phy: uniphier-pcie: Depend on HAS_IOMEMKunihiko Hayashi1-1/+2
2018-09-25phy: socionext: add PCIe PHY driver supportKunihiko Hayashi3-0/+250
2018-09-10phy: socionext: add USB2 PHY driver for UniPhier SoCKunihiko Hayashi3-0/+258
2018-09-10phy: socionext: add USB3 PHY driver for UniPhier SoCKunihiko Hayashi4-0/+789