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path: root/drivers/phy/socionext
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2019-04-17phy: socionext: get optional clock by devm_clk_get_optional()Chunfeng Yun2-14/+6
Use devm_clk_get_optional() to get optional clock Cc: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Chunfeng Yun <chunfeng.yun@mediatek.com> Reviewed-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-11-12phy: uniphier-pcie: Depend on HAS_IOMEMKunihiko Hayashi1-1/+2
The driver uses devm_ioremap_resource() which is only available when CONFIG_HAS_IOMEM is set, so the driver depends on this option. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-09-25phy: socionext: add PCIe PHY driver supportKunihiko Hayashi3-0/+250
Add a driver for PHY interface built into PCIe controller implemented in UniPhier SoCs. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-09-10phy: socionext: add USB2 PHY driver for UniPhier SoCKunihiko Hayashi3-0/+258
Add a driver for PHY interface built into USB2 controller implemented on UniPhier SoCs. This driver supports HS-PHY for Pro4 and LD11. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
2018-09-10phy: socionext: add USB3 PHY driver for UniPhier SoCKunihiko Hayashi4-0/+789
Add a driver for PHY interface built into USB3 controller implemented in UniPhier SoCs. This driver supports High-Speed PHY and Super-Speed PHY. Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Motoya Tanigawa <tanigawa.motoya@socionext.com> Signed-off-by: Masami Hiramatsu <masami.hiramatsu@linaro.org> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>