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path: root/drivers/phy/xilinx
AgeCommit message (Expand)AuthorFilesLines
2023-03-31phy: xilinx: phy-zynqmp: mention SGMII as supported protocolRadhey Shyam Pandey1-3/+2
2022-01-27phy: xilinx: zynqmp: Fix bus width setting for SGMIIRobert Hancock1-5/+6
2021-08-18phy: xilinx: zynqmp: skip PHY initialization and PLL lock for USBPiyush Mehta1-0/+3
2021-03-31phy: zynqmp: Handle the clock enable/disable properlyManish Narani1-7/+51
2021-02-06phy: zynqmp: Simplify code by using dev_err_probe()Michal Simek1-7/+4
2020-07-01phy: zynqmp: Fix unused-function compiler warningTobias Klauser1-4/+2
2020-06-29phy: zynqmp: Add PHY driver for the Xilinx ZynqMP Gigabit TransceiverAnurag Kumar Vulisha3-0/+1011