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path: root/drivers/platform/x86/intel/speed_select_if
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2023-10-04platform/x86: ISST: Ignore minor version changeSrinivas Pandruvada1-4/+12
The hardware definition of every TPMI feature contains a major and minor version. When there is a change in the MMIO offset or change in the definition of a field, hardware will change major version. For addition of new fields without modifying existing MMIO offsets or fields, only the minor version is changed. Driver is developed to support SST functionality for a major and minor version. If the hardware changes major version, since offsets and definitions are changed, driver cannot continue to provide SST interface to users. Driver can still function with a minor version change as it will just miss the new functionality added by the hardware. The current implementation doesn't ignore any version change. If there is mismatch with the minor version, continue with an information log message. If there is mismatch with the major version, log error and exit. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://lore.kernel.org/r/20231003184916.1860084-3-srinivas.pandruvada@linux.intel.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2023-10-04platform/x86: intel_speed_select_if: Use devm_ioremap_resourceSrinivas Pandruvada1-4/+5
Replace devm_ioremap() with devm_ioremap_resource() by defining a resource. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Suggested-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20231003163234.1856669-5-srinivas.pandruvada@linux.intel.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2023-10-04platform/x86: intel_speed_select_if: Remove hardcoded map sizeSrinivas Pandruvada1-6/+10
The driver is using 256 as the size while calling devm_ioremap(). The maximum offset can be obtained from isst_mmio_range. Add a field "size" to the isst_mmio_range and use it instead of hardcoding. No functional impact is expected. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20231003163234.1856669-4-srinivas.pandruvada@linux.intel.com Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2023-10-04platform/x86: ISST: Allow level 0 to be not presentSrinivas Pandruvada1-3/+0
It is possible that SST level 0 or base level is not present in some configurations. So don't set level 0 mask in level_en_mask by default. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20231003163234.1856669-3-srinivas.pandruvada@linux.intel.com Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2023-10-04platform/x86: ISST: Use fuse enabled mask instead of allowed levelsSrinivas Pandruvada1-1/+1
Allowed level mask is a mask of levels, which are currently allowed to dynamically switch by the OS. Fused mask is a mask of all levels even if OS is not allowed to switch. Even if OS is not allowed to dynamically switch, it is still possible for user to boot to a level by using BIOS option. To decide which level to boot next time, user wants to check parameters (power, performance or thermal) of that level to decide. So, when passing the level mask for display to user space, use fuse enabled mask, which has all levels. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://lore.kernel.org/r/20231003163234.1856669-2-srinivas.pandruvada@linux.intel.com Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Signed-off-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com>
2023-08-29Merge tag 'perf-core-2023-08-28' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull perf event updates from Ingo Molnar: - AMD IBS improvements - Intel PMU driver updates - Extend core perf facilities & the ARM PMU driver to better handle ARM big.LITTLE events - Micro-optimize software events and the ring-buffer code - Misc cleanups & fixes * tag 'perf-core-2023-08-28' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: perf/x86/uncore: Remove unnecessary ?: operator around pcibios_err_to_errno() call perf/x86/intel: Add Crestmont PMU x86/cpu: Update Hybrids x86/cpu: Fix Crestmont uarch x86/cpu: Fix Gracemont uarch perf: Remove unused extern declaration arch_perf_get_page_size() perf: Remove unused PERF_PMU_CAP_HETEROGENEOUS_CPUS capability arm_pmu: Remove unused PERF_PMU_CAP_HETEROGENEOUS_CPUS capability perf/x86: Remove unused PERF_PMU_CAP_HETEROGENEOUS_CPUS capability arm_pmu: Add PERF_PMU_CAP_EXTENDED_HW_TYPE capability perf/x86/ibs: Set mem_lvl_num, mem_remote and mem_hops for data_src perf/mem: Add PERF_MEM_LVLNUM_NA to PERF_MEM_NA perf/mem: Introduce PERF_MEM_LVLNUM_UNC perf/ring_buffer: Use local_try_cmpxchg in __perf_output_begin locking/arch: Avoid variable shadowing in local_try_cmpxchg() perf/core: Use local64_try_cmpxchg in perf_swevent_set_period perf/x86: Use local64_try_cmpxchg perf/amd: Prevent grouping of IBS events
2023-08-09platform/x86: ISST: Reduce noise for missing numa information in logsSrinivas Pandruvada1-2/+2
On platforms with no numa support and with several CPUs, logs have lots of noise for message "Fail to get numa node for CPU:.." Change pr_info() to pr_info_once() as one print is enough to show the issue. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://lore.kernel.org/r/20230808174359.50602-1-srinivas.pandruvada@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-08-09x86/cpu: Fix Crestmont uarchPeter Zijlstra1-1/+1
Sierra Forest and Grand Ridge are both E-core only using Crestmont micro-architecture, They fit the pre-existing naming scheme prefectly fine, adhere to it. Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com> Acked-by: Hans de Goede <hdegoede@redhat.com> Link: https://lore.kernel.org/r/20230807150405.757666627@infradead.org
2023-07-01Merge tag 'platform-drivers-x86-v6.5-1' of ↵Linus Torvalds2-0/+3
git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86 Pull x86 platform driver updates from Hans de Goede: "AMD PMC and PMF drivers: - Various bugfixes - Improved debugging support Intel PMC: - Refactor to support hw with multiple PMCs - Various other improvements / new hw support Intel Speed Select Technology (ISST): - TPMI Uncore Frequency + Cluster Level Power Controls - Various bugfixes - tools/intel-speed-select: Misc improvements Dell-DDV: Add documentation INT3472 ACPI camera sensor glue code: - Evaluate device's _DSM method to control imaging clock - Drop the need to have a table with per sensor-model info Lenovo Yogabook: - Refactor / rework to also support Android models Think-LMI: - Multiple improvements and fixes WMI: - Add proper API documentation for the WMI bus x86-android-tablets: - Misc new hw support Miscellaneous other cleanups / fixes" * tag 'platform-drivers-x86-v6.5-1' of git://git.kernel.org/pub/scm/linux/kernel/git/pdx86/platform-drivers-x86: (91 commits) platform/x86:intel/pmc: Add Meteor Lake IOE-M PMC related maps platform/x86:intel/pmc: Add Meteor Lake IOE-P PMC related maps platform/x86:intel/pmc: Use SSRAM to discover pwrm base address of primary PMC platform/x86:intel/pmc: Discover PMC devices platform/x86:intel/pmc: Enable debugfs multiple PMC support platform/x86:intel/pmc: Add support to handle multiple PMCs platform/x86:intel/pmc: Combine core_init() and core_configure() platform/x86:intel/pmc: Update maps for Meteor Lake P/M platforms platform/x86/intel: tpmi: Remove hardcoded unit and offset platform/x86: int3472: discrete: Log a warning if the pin-numbers don't match platform/x86: int3472: discrete: Use FIELD_GET() on the GPIO _DSM return value platform/x86: int3472: discrete: Add alternative "AVDD" regulator supply name platform/x86: int3472: discrete: Add support for 1 GPIO regulator shared between 2 sensors platform/x86: int3472: discrete: Remove sensor_config-s platform/x86: int3472: discrete: Drop GPIO remapping support platform/x86: apple-gmux: don't use be32_to_cpu and cpu_to_be32 platform/x86/dell/dell-rbtn: Fix resources leaking on error path platform/x86: ISST: Fix usage counter platform/x86: ISST: Reset default callback on unregister platform/x86: int3472: Switch back to use struct i2c_driver's .probe() ...
2023-06-13platform/x86: ISST: Fix usage counterSrinivas Pandruvada1-0/+2
On multi package system, the TPMI SST instance is getting allocated again as the usage counter is not getting incremented. Here the instance is allocated only when the usage count is zero. There is no need to allocate again. Increment usage ID on successful return from isst_if_cdev_register(). Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://lore.kernel.org/r/20230612224033.2382527-3-srinivas.pandruvada@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-06-13platform/x86: ISST: Reset default callback on unregisterSrinivas Pandruvada1-0/+1
When multiple clients are registered and some of those modules are removed, the default IOCTL callback for those clients are still not NULL. Calling them will result in crash. Set the default IOCTL callback pointer to NULL on unregister. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://lore.kernel.org/r/20230612224033.2382527-2-srinivas.pandruvada@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-05-23platform/x86: ISST: Remove 8 socket limitSteve Wahl1-7/+5
Stop restricting the PCI search to a range of PCI domains fed to pci_get_domain_bus_and_slot(). Instead, use for_each_pci_dev() and look at all PCI domains in one pass. On systems with more than 8 sockets, this avoids error messages like "Information: Invalid level, Can't get TDP control information at specified levels on cpu 480" from the intel speed select utility. Fixes: aa2ddd242572 ("platform/x86: ISST: Use numa node id for cpu pci dev mapping") Signed-off-by: Steve Wahl <steve.wahl@hpe.com> Reviewed-by: Ilpo Järvinen <ilpo.jarvinen@linux.intel.com> Link: https://lore.kernel.org/r/20230519160420.2588475-1-steve.wahl@hpe.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-03-27platform/x86: ISST: unlock on error path in tpmi_sst_init()Dan Carpenter1-2/+4
Call mutex_unlock(&isst_tpmi_dev_lock) before returning on this error path. Fixes: d805456c712f ("platform/x86: ISST: Enumerate TPMI SST and create framework") Signed-off-by: Dan Carpenter <error27@gmail.com> Acked-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://lore.kernel.org/r/dcdebbb7-7de6-4d04-8e7a-43d5ca043484@kili.mountain Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-03-16platform/x86: ISST: Add suspend/resume callbacksSrinivas Pandruvada3-0/+70
To support S3/S4 with TPMI interface add suspend/resume callbacks. Here HW state is stored in suspend callback and restored during resume callback. The hardware state which needs to be stored/restored: - CLOS configuration - CLOS Association - SST-CP enable/disable status - SST-PP perf level setting Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Suggested-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Zhang Rui <rui.zhang@intel.com> Tested-by: Pragya Tanwar <pragya.tanwar@intel.com> Link: https://lore.kernel.org/r/20230308070642.1727167-9-srinivas.pandruvada@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-03-16platform/x86: ISST: Add SST-TF support via TPMISrinivas Pandruvada1-0/+66
The support of Intel Speed Select Technology - Turbo Frequency (SST-TF) feature enables the ability to set different “All core turbo ratio limits” to cores based on the priority. By using this feature, some cores can be configured to get higher turbo frequency by designating them as high priority at the cost of lower or no turbo frequency on the low priority cores. One new IOCTLs are added: ISST_IF_GET_TURBO_FREQ_INFO : Get information about turbo frequency buckets Once an instance is identified, read or write from correct MMIO offset for a given field as defined in the specification. For details on SST-TF operations using intel-speed-selet utility, refer to: Documentation/admin-guide/pm/intel-speed-select.rst under the kernel documentation Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Zhang Rui <rui.zhang@intel.com> Tested-by: Pragya Tanwar <pragya.tanwar@intel.com> Link: https://lore.kernel.org/r/20230308070642.1727167-8-srinivas.pandruvada@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-03-16platform/x86: ISST: Add SST-BF support via TPMISrinivas Pandruvada1-0/+87
The Intel Speed Select Technology - Base Frequency (SST-BF) feature lets the user control base frequency. If some critical workload threads demand constant high guaranteed performance, then this feature can be used to execute the thread at higher base frequency on specific sets of CPUs (high priority CPUs) at the cost of lower base frequency (low priority CPUs) on other CPUs. Two new IOCTLs are added: ISST_IF_GET_BASE_FREQ_INFO : Get frequency information for high and low priority CPUs ISST_IF_GET_BASE_FREQ_CPU_MASK : CPUs capable of higher frequency Once an instance is identified, read or write from correct MMIO offset for a given field as defined in the specification. For details on SST-BF operations using intel-speed-selet utility, refer to: Documentation/admin-guide/pm/intel-speed-select.rst under the kernel documentation Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Zhang Rui <rui.zhang@intel.com> Tested-by: Pragya Tanwar <pragya.tanwar@intel.com> Link: https://lore.kernel.org/r/20230308070642.1727167-7-srinivas.pandruvada@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-03-16platform/x86: ISST: Add SST-PP support via TPMISrinivas Pandruvada1-1/+416
This Intel Speed Select Technology - Performance Profile (SST-PP) feature introduces a mechanism that allows multiple optimized performance profiles per system. Each profile defines a set of CPUs that need to be online and rest offline to sustain a guaranteed base frequency. Five new IOCTLs are added: ISST_IF_PERF_LEVELS : Get number of performance levels ISST_IF_PERF_SET_LEVEL : Set to a new performance level ISST_IF_PERF_SET_FEATURE : Activate SST-BF/SST-TF for a performance level ISST_IF_GET_PERF_LEVEL_INFO : Get parameters for a performance level ISST_IF_GET_PERF_LEVEL_CPU_MASK : Get CPU mask for a performance level Once an instance is identified, read or write from correct MMIO offset for a given field as defined in the specification. For details on SST PP operations using intel-speed-selet utility, refer to: Documentation/admin-guide/pm/intel-speed-select.rst under the kernel documentation Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Zhang Rui <rui.zhang@intel.com> Tested-by: Pragya Tanwar <pragya.tanwar@intel.com> Link: https://lore.kernel.org/r/20230308070642.1727167-6-srinivas.pandruvada@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-03-16platform/x86: ISST: Add SST-CP support via TPMISrinivas Pandruvada1-0/+264
Intel Speed Select Technology Core Power (SST-CP) is an interface that allows users to define per core priority. This defines a mechanism to distribute power among cores when there is a power constrained scenario. This defines a class of service (CLOS) configuration. Three new IOCTLs are added: ISST_IF_CORE_POWER_STATE : Enable/Disable SST-CP ISST_IF_CLOS_PARAM : Configure CLOS parameters ISST_IF_CLOS_ASSOC : Associate CPUs to a CLOS To associate CPUs to CLOS, either Linux CPU numbering or PUNIT numbering scheme can be used, using parameter punit_cpu_map (1: for PUNIT numbering 0 for Linux CPU number). There is no change to IOCTL to get PUNIT CPU number for a CPU. Introduce get_instance() function, which is used by majority of IOCTLs processing to convert a socket and power domain to tpmi_per_power_domain_info * instance. This instance has all the MMIO offsets stored to read a particular field. Once an instance is identified, read or write from correct MMIO offset for a given field as defined in the specification. For details on SST CP operations using intel-speed-selet utility, refer to: Documentation/admin-guide/pm/intel-speed-select.rst under the kernel documentation Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Zhang Rui <rui.zhang@intel.com> Tested-by: Pragya Tanwar <pragya.tanwar@intel.com> Link: https://lore.kernel.org/r/20230308070642.1727167-5-srinivas.pandruvada@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-03-16platform/x86: ISST: Parse SST MMIO and update instanceSrinivas Pandruvada1-4/+287
SST registers are presented to OS in multi-layer structures starting with a SST header showing version information freezing current definition. For details on SST terminology refer to Documentation/admin-guide/pm/intel-speed-select.rst under the kernel documentation SST TPMI details are published in the following document: https://github.com/intel/tpmi_power_management/blob/main/SST_TPMI_public_disclosure_FINAL.docx SST MMIO structure layout follows: SST-HEADER SST-CP Header SST-CP CONTROL SST-CP STATUS SST-CP CONFIG0 SST-CP CONFIG1 ... ... SST-PP Header SST-PP OFFSET_0 SST-PP OFFSET_1 SST_PP_0_INFO SST_PP_1_INFO SST_PP_2_INFO SST_PP_3_INFO SST-PP CONTROL SST-PP STATUS Each register bank contains information to get to next lower level information. This information is parsed and stored in the struct tpmi_per_power_domain_info for each domain. This information is used to process each SST requests. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Zhang Rui <rui.zhang@intel.com> Tested-by: Pragya Tanwar <pragya.tanwar@intel.com> Link: https://lore.kernel.org/r/20230308070642.1727167-4-srinivas.pandruvada@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-03-16platform/x86: ISST: Enumerate TPMI SST and create frameworkSrinivas Pandruvada5-0/+349
Enumerate TPMI SST driver and create basic framework to add more features. The basic user space interface is still same as the legacy using /dev/isst_interface. Users of "intel-speed-select" utility should be able to use same commands as prior gens without being aware of new underlying hardware interface. TPMI SST driver enumerates on device "intel_vsec.tpmi-sst". Since there can be multiple instances and there is one common SST core, split implementation into two parts: A common core part and an enumeration part. The enumeration driver is loaded for each device instance and register with the TPMI SST core driver. On very first enumeration the TPMI SST core driver register with SST core driver to get IOCTL callbacks. The api_version is incremented for IOCTL ISST_IF_GET_PLATFORM_INFO, so that user space can issue new IOCTLs. Each TPMI package contains multiple power domains. Each power domain has its own set of SST controls. For each domain map the MMIO memory and update per domain struct tpmi_per_power_domain_info. This information will be used to implement other SST interfaces. Implement first IOCTL commands to get number of TPMI SST instances and instance mask as some of the power domains may not have any SST controls. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Zhang Rui <rui.zhang@intel.com> Tested-by: Pragya Tanwar <pragya.tanwar@intel.com> Link: https://lore.kernel.org/r/20230308070642.1727167-3-srinivas.pandruvada@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-03-16platform/x86: ISST: Add support for MSR 0x54Srinivas Pandruvada1-0/+28
To map Linux CPU numbering scheme to hardware CPU numbering scheme MSR 0x53 is getting used. But for new generation of CPUs, this MSR is not valid. Since this is model specific MSR, this is possible. A new MSR 0x54 is defined for this purpose. User space can use the API version to distinguish format from MSR 0x53. Intel speed select utility is updated to use the new format based on the API version. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Reviewed-by: Zhang Rui <rui.zhang@intel.com> Tested-by: Pragya Tanwar <pragya.tanwar@intel.com> Link: https://lore.kernel.org/r/20230308070642.1727167-2-srinivas.pandruvada@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2023-03-07platform/x86: ISST: Add API version of the targetSrinivas Pandruvada2-2/+9
User space can get the API version using IOCTL ISST_IF_GET_PLATFORM_INFO. This information can be used to get IOCTLs supported by the kernel driver. This version is hardcoded in the driver. Allow the registered client to specify the supported API version. In this way a registered client can specify a higher API version to extend IOCTL set. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://lore.kernel.org/r/20230211063257.311746-5-srinivas.pandruvada@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com>
2023-03-07platform/x86: ISST: Add IOCTL default callbackSrinivas Pandruvada2-0/+15
The common IOCTL handler has a predefined list of IOCTLs it can handle. There is no default handler, if there is no match. Allow a client driver to define their own version of default IOCTL callback. In this way the default handling is passed to the client drivers to handle. With the introduction of TPMI target, IOCTL list is extended. The additional TPMI specific IOCTLs will be passed to the TPMI client driver default IOCTL handler. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://lore.kernel.org/r/20230211063257.311746-4-srinivas.pandruvada@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com>
2023-03-07platform/x86: ISST: Add TPMI targetSrinivas Pandruvada1-1/+2
Add TPMI as one of the device type which can be registered with ISST common driver. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://lore.kernel.org/r/20230211063257.311746-3-srinivas.pandruvada@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com>
2023-03-07platform/x86: ISST: Fix kernel documentation warningsSrinivas Pandruvada2-1/+3
Fix warning displayed for "make W=1" for kernel documentation. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://lore.kernel.org/r/20230211063257.311746-2-srinivas.pandruvada@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com>
2023-03-07platform/x86: ISST: Increase range of valid mail box commandsSrinivas Pandruvada1-1/+1
A new command CONFIG_TDP_GET_RATIO_INFO is added, with sub command type of 0x0C. The previous range of valid sub commands was from 0x00 to 0x0B. Change the valid range from 0x00 to 0x0C. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://lore.kernel.org/r/20230227053504.2734214-1-srinivas.pandruvada@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com>
2022-11-16platform/x86: ISST: Fix typo in commentschen zhang1-1/+1
Fix spelling typo in comments. Reported-by: k2ci <kernel-bot@kylinos.cn> Signed-off-by: chen zhang <chenzhang@kylinos.cn> Acked-by: Randy Dunlap <rdunlap@infradead.org> Link: https://lore.kernel.org/r/20221103013313.13278-1-chenzhang@kylinos.cn Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2022-07-02platform/x86: ISST: PUNIT device mapping with Sub-NUMA clusteringSrinivas Pandruvada1-7/+32
On a multiple package system using Sub-NUMA clustering, there is an issue in mapping Linux CPU number to PUNIT PCI device when manufacturer decided to reuse the PCI bus number across packages. Bus number can be reused as long as they are in different domain or segment. In this case some CPU will fail to find a PCI device to issue SST requests. When bus numbers are reused across CPU packages, we are using proximity information by matching CPU numa node id to PUNIT PCI device numa node id. But on a package there can be only one PUNIT PCI device, but multiple numa nodes (one for each sub cluster). So, the numa node ID of the PUNIT PCI device can only match with one numa node id of CPUs in a sub cluster in the package. Since there can be only one PUNIT PCI device per package, if we match with numa node id of any sub cluster in that package, we can use that mapping for any CPU in that package. So, store the match information in a per package data structure and return the information when there is no match. While here, use defines for max bus number instead of hardcoding. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://lore.kernel.org/r/20220629194817.2418240-1-srinivas.pandruvada@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2022-01-24platform/x86: ISST: Fix possible circular locking dependency detectedSrinivas Pandruvada1-34/+63
As reported: [ 256.104522] ====================================================== [ 256.113783] WARNING: possible circular locking dependency detected [ 256.120093] 5.16.0-rc6-yocto-standard+ #99 Not tainted [ 256.125362] ------------------------------------------------------ [ 256.131673] intel-speed-sel/844 is trying to acquire lock: [ 256.137290] ffffffffc036f0d0 (punit_misc_dev_lock){+.+.}-{3:3}, at: isst_if_open+0x18/0x90 [isst_if_common] [ 256.147171] [ 256.147171] but task is already holding lock: [ 256.153135] ffffffff8ee7cb50 (misc_mtx){+.+.}-{3:3}, at: misc_open+0x2a/0x170 [ 256.160407] [ 256.160407] which lock already depends on the new lock. [ 256.160407] [ 256.168712] [ 256.168712] the existing dependency chain (in reverse order) is: [ 256.176327] [ 256.176327] -> #1 (misc_mtx){+.+.}-{3:3}: [ 256.181946] lock_acquire+0x1e6/0x330 [ 256.186265] __mutex_lock+0x9b/0x9b0 [ 256.190497] mutex_lock_nested+0x1b/0x20 [ 256.195075] misc_register+0x32/0x1a0 [ 256.199390] isst_if_cdev_register+0x65/0x180 [isst_if_common] [ 256.205878] isst_if_probe+0x144/0x16e [isst_if_mmio] ... [ 256.241976] [ 256.241976] -> #0 (punit_misc_dev_lock){+.+.}-{3:3}: [ 256.248552] validate_chain+0xbc6/0x1750 [ 256.253131] __lock_acquire+0x88c/0xc10 [ 256.257618] lock_acquire+0x1e6/0x330 [ 256.261933] __mutex_lock+0x9b/0x9b0 [ 256.266165] mutex_lock_nested+0x1b/0x20 [ 256.270739] isst_if_open+0x18/0x90 [isst_if_common] [ 256.276356] misc_open+0x100/0x170 [ 256.280409] chrdev_open+0xa5/0x1e0 ... The call sequence suggested that misc_device /dev file can be opened before misc device is yet to be registered, which is done only once. Here punit_misc_dev_lock was used as common lock, to protect the registration by multiple ISST HW drivers, one time setup, prevent duplicate registry of misc device and prevent load/unload when device is open. We can split into locks: - One which just prevent duplicate call to misc_register() and one time setup. Also never call again if the misc_register() failed or required one time setup is failed. This lock is not shared with any misc device callbacks. - The other lock protects registry, load and unload of HW drivers. Sequence in isst_if_cdev_register() - Register callbacks under punit_misc_dev_open_lock - Call isst_misc_reg() which registers misc_device on the first registry which is under punit_misc_dev_reg_lock, which is not shared with callbacks. Sequence in isst_if_cdev_unregister Just opposite of isst_if_cdev_register Reported-and-tested-by: Liwei Song <liwei.song@windriver.com> Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Link: https://lore.kernel.org/r/20220112022521.54669-1-srinivas.pandruvada@linux.intel.com Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-08-26platform/x86: ISST: use semi-colons instead of commasDan Carpenter1-3/+3
The code works the same either way, but it's better to use semi-colons to separate statements. Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Link: https://lore.kernel.org/r/20210825072357.GA12957@kili Signed-off-by: Hans de Goede <hdegoede@redhat.com>
2021-08-20platform/x86: intel_speed_select_if: Move to intel sub-directoryKate Hsuan7-0/+1481
Move Intel Speed Select interface driver to intel sub-directory to improve readability and rename it from intel_speed_select_if to speed_select_if. Signed-off-by: Kate Hsuan <hpa@redhat.com> Reviewed-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Link: https://lore.kernel.org/r/20210820110458.73018-14-andriy.shevchenko@linux.intel.com Signed-off-by: Hans de Goede <hdegoede@redhat.com>