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2024-02-21spi: cadence-qspi: report correct number of chip-selectThéo Lebrun1-2/+6
Set the ->num_chipselect field in struct cqspi_st and struct spi_controller to the current number of chip-select. The value is dependent on declared flashes in devicetree. Previously, the num-cs property from devicetree or the maximum value was being reported. Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Link: https://msgid.link/r/20240209-cdns-qspi-cs-v1-3-a4f9dfed9ab4@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-21spi: cadence-qspi: set maximum chip-select to 4Théo Lebrun1-1/+3
Change the maximum chip-select count in cadence-qspi to 4 instead of 16. The value gets used as default ->num_chipselect when the num-cs DT property isn't received from devicetree. It also determines the cqspi->f_pdata array size. Hardware only supports values up to 4; see cqspi_chipselect() that sets CS using a one-bit-per-CS 4-bit register field. Add a static_assert() call as a defensive measure to ensure we stay under the SPI subsystem limit. It got set to 4 when introduced in 4d8ff6b0991d ("spi: Add multi-cs memories support in SPI core") and later increased to 16 in 2f8c7c3715f2 ("spi: Raise limit on number of chip selects"). Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Link: https://msgid.link/r/20240209-cdns-qspi-cs-v1-2-a4f9dfed9ab4@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-21spi: cadence-qspi: assert each subnode flash CS is validThéo Lebrun1-1/+1
Check each flash CS against the num-cs property from devicetree. Fallback to the driver max supported value (CQSPI_MAX_CHIPSELECT) if num-cs isn't present. cqspi->num_chipselect is set in cqspi_of_get_pdata() to the num-cs devicetree property, or to CQSPI_MAX_CHIPSELECT if num-cs is not set. Signed-off-by: Théo Lebrun <theo.lebrun@bootlin.com> Reviewed-by: Dhruva Gole <d-gole@ti.com> Link: https://msgid.link/r/20240209-cdns-qspi-cs-v1-1-a4f9dfed9ab4@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-15spi: dw: remove redundant assignment to variable lenColin Ian King1-1/+1
The variable id len being initialized with a value that is never read, it is being re-assigned later on in a for-loop. The initialization is redundant and can be removed. Cleans up clang scan build warning: drivers/spi/spi-dw-dma.c:580:17: warning: Although the value stored to 'len' is used in the enclosing expression, the value is never actually read from 'len' [deadcode.DeadStores] Signed-off-by: Colin Ian King <colin.i.king@gmail.com> Acked-by: Serge Semin <fancer.lancer@gmail.com> Link: https://msgid.link/r/20240215131603.2062332-1-colin.i.king@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-13spi: mchp-pci1xxxx: release resources on error in probe()Dan Carpenter1-1/+1
Call pci_release_regions(pdev) before returning on this error path. Fixes: 3e7cfd6ad29a ("spi: mchp-pci1xxxx: Add support for DMA in SPI") Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org> Link: https://msgid.link/r/efc92197-4023-4bfe-bc63-452e7ed112e8@moroto.mountain Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: straightforward cleanupMark Brown1-40/+41
Merge series from Tudor Ambarus <tudor.ambarus@linaro.org>: Various simple cleanups for the s3c64xx driver. Tested with gs101-spi.
2024-02-08spi: get rid of some legacy macrosMark Brown27-100/+109
Merge series from Uwe Kleine-König <u.kleine-koenig@pengutronix.de>: This series finishes off the removal of some of the legacy names for SPI controllers and devices.
2024-02-08spi: s3c64xx: add support for google,gs101-spiMark Brown1-15/+70
Merge series from Tudor Ambarus <tudor.ambarus@linaro.org>: The Google GCS101 uses a variant of the Samsung SPI controller IP.
2024-02-08spi: mchp-pci1xxxx: DMA support for copying data to and from SPI BufThangaraj Samynathan1-27/+338
pci1xxxx_spi_transfer_with_dma adds DMA support to copy the data between host cpu buffer and SPI IO Buffer. On DMA Completion interrupt, the next SPI transaction is initiated in isr. Helper functions pci1xxxx_spi_setup, pci1xxxx_spi_setup_dma_from_io, pci1xxxx_spi_setup_dma_to_io and pci1xxxx_start_spi_xfer are added for setting up spi, setting up dma operations, and to start spi transfer respectively. In the existing implementation, codes are replaced with helper functions wherever applicable. Signed-off-by: Thangaraj Samynathan <thangaraj.s@microchip.com> Link: https://lore.kernel.org/r/20240207080621.30742-3-thangaraj.s@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: mchp-pci1xxxx: Add support for DMA in SPIThangaraj Samynathan1-0/+145
In PCI1xxxx C0, support for DMA in PCIe endpoint is added to enhance the SPI performance. With this support, the performance is improved from 6Mbps to 17Mbps with 20Mhz clock. - DMA Supports two Channels, 0 and 1 - SPI Instance 0 uses chan 0 and SPI Instance 1 uses chan 1 - DMA can be used only if SPI is mapped to PF0 in the multi function endpoint and the MSI interrupt is supported - MSI interrupt of one of the SPI instance is assigned to the DMA and both channels 0 and 1 share the same irq, the MSI address and MSI Data of the irq is obtained and stored in DMA registers to generate interrupt Signed-off-by: Thangaraj Samynathan <thangaraj.s@microchip.com> Link: https://lore.kernel.org/r/20240207080621.30742-2-thangaraj.s@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: add support for google,gs101-spiTudor Ambarus1-1/+17
Add support for GS101 SPI. GS101 integrates 16 SPI nodes, all with 64 bytes FIFOs. GS101 allows just 32 bit register accesses, otherwise a Serror Interrupt is raised. Do the write reg accesses in 32 bits. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207111516.2563218-5-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: add s3c64xx_iowrite{8,16}_32_rep accessorsTudor Ambarus1-2/+34
Allow SoCs that require 32 bits register accesses to write data in chunks of 8 or 16 bits. One SoC that requires 32 bit register accesses is the google gs101. The operation is rare, thus open code it in the driver rather than making it generic (through asm-generic/io.h). Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207111516.2563218-4-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: prepare for a different flavor of iowrite repTudor Ambarus1-14/+21
There are SoCs (gs101) that allow only 32 bit register accesses. As the requirement is rare enough, for those SoCs we'll open code in the driver some s3c64xx_iowrite{8,16}_32_rep() accessors. Prepare for such addition. Suggested-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Link: https://lore.kernel.org/r/20240207111516.2563218-3-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: drop a superfluous bitwise NOT operationTudor Ambarus1-1/+0
val &= ~mask; val |= mask; is equivalent to: val |= mask; Drop the superfluous bitwise NOT operation. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-18-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: remove duplicated definitionTudor Ambarus1-3/+1
S3C64XX_SPI_TRAILCNT brings no benefit in terms of name over S3C64XX_SPI_MAX_TRAILCNT. Remove the duplicated definition. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-17-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: downgrade dev_warn to dev_dbg for optional dt propsTudor Ambarus1-2/+2
"samsung,spi-src-clk" and "num-cs" are optional dt properties. Downgrade the message from warning to debug message. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-16-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: drop blank line between declarationsTudor Ambarus1-1/+2
Drop the blank line and move the logical operation in the body of the function rather than in initialization list. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-15-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: return ETIMEDOUT for wait_for_completion_timeout()Tudor Ambarus1-3/+3
ETIMEDOUT is more specific than EIO, use it for wait_for_completion_timeout(). Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-14-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: rename prepare_dma() to s3c64xx_prepare_dma()Tudor Ambarus1-4/+4
Don't monopolize the name. Prepend the driver prefix to the function name. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-13-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: propagate the dma_submit_error() error codeTudor Ambarus1-1/+1
DMA submit should just add the dma descriptor to a queue, without firing it. EIO is misleading and hides what happens in DMA. Propagate the dma_submit_error() error code, don't overwrite it. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-12-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: check return code of dmaengine_slave_config()Tudor Ambarus1-1/+3
Check the return code of dmaengine_slave_config(). Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-11-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: move common code outside if elseTudor Ambarus1-4/+2
Move common code outside if else to avoid code duplication. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-10-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: remove else after returnTudor Ambarus1-4/+2
Else case is not needed after a return, remove it. Reviewed-by: Andi Shyti <andi.shyti@kernel.org> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-9-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: remove unneeded (void *) casts in of_match_tableTudor Ambarus1-9/+9
of_device_id::data is an opaque pointer. No explicit cast is needed. Remove unneeded (void *) casts in of_match_table. Reviewed-by: Andi Shyti <andi.shyti@kernel.org> Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-8-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: fix typo, s/configuartion/configurationTudor Ambarus1-1/+1
Fix typo, s/configuartion/configuration. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-7-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: avoid possible negative array indexTudor Ambarus1-0/+3
The platform id is used as an index into the fifo_lvl_mask array. Platforms can come with a negative device ID, PLATFORM_DEVID_NONE (-1), thus we risked a negative array index. Catch such cases and fail to probe. Reviewed-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-6-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: explicitly include <linux/types.h>Tudor Ambarus1-0/+1
The driver uses u32 and relies on an implicit inclusion of <linux/types.h>. It is good practice to directly include all headers used, it avoids implicit dependencies and spurious breakage if someone rearranges headers and causes the implicit include to vanish. Include the missing header. Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-5-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: explicitly include <linux/bits.h>Tudor Ambarus1-0/+1
The driver uses GENMASK() but does not include <linux/bits.h>. It is good practice to directly include all headers used, it avoids implicit dependencies and spurious breakage if someone rearranges headers and causes the implicit include to vanish. Include the missing header. Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-4-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: explicitly include <linux/io.h>Tudor Ambarus1-0/+1
The driver uses readl() but does not include <linux/io.h>. It is good practice to directly include all headers used, it avoids implicit dependencies and spurious breakage if someone rearranges headers and causes the implicit include to vanish. Include the missing header. Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-3-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: s3c64xx: sort headers alphabeticallyTudor Ambarus1-7/+6
Sorting headers alphabetically helps locating duplicates, and makes it easier to figure out where to insert new headers. Reviewed-by: Andi Shyti <andi.shyti@kernel.org> Reviewed-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Tudor Ambarus <tudor.ambarus@linaro.org> Link: https://lore.kernel.org/r/20240207120431.2766269-2-tudor.ambarus@linaro.org Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: Drop compat layer from renaming "master" to "controller"Uwe Kleine-König1-1/+1
Now that all in-tree users followed the rename, the compat stuff can go away. This completes the renaming started with commit 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller"") Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/ad1d949325b61a4682e8d6ecf9d05da751e6a99f.1707324794.git.u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: fsl-lib: Follow renaming of SPI "master" to "controller"Uwe Kleine-König1-7/+7
In commit 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller"") some functions and struct members were renamed. To not break all drivers compatibility macros were provided. To be able to remove these compatibility macros push the renaming into this driver. Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/b3d724ca2b641f1d717a7ddb9810bdf27168dc35.1707324794.git.u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: spidev: Follow renaming of SPI "master" to "controller"Uwe Kleine-König1-1/+1
In commit 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller"") some functions and struct members were renamed. To not break all drivers compatibility macros were provided. To be able to remove these compatibility macros push the renaming into this driver. Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/15ebfdf58a6590962bdd51b49b2e85a69b3bf443.1707324794.git.u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: slave-mt27xx: Follow renaming of SPI "master" to "controller"Uwe Kleine-König1-1/+1
In commit 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller"") some functions and struct members were renamed. To not break all drivers compatibility macros were provided. To be able to remove these compatibility macros push the renaming into this driver. Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/184a5263af2ec01fd5ad9b8db667ae4d6cbec948.1707324794.git.u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: loopback-test: Follow renaming of SPI "master" to "controller"Uwe Kleine-König1-2/+2
In commit 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller"") some functions and struct members were renamed. To not break all drivers compatibility macros were provided. To be able to remove these compatibility macros push the renaming into this driver. Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/2f57c89d601d0875cd245a2e95c915b9bfcfc47d.1707324794.git.u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: geni-qcom: Follow renaming of SPI "master" to "controller"Uwe Kleine-König1-1/+1
In commit 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller"") some functions and struct members were renamed. To not break all drivers compatibility macros were provided. To be able to remove these compatibility macros push the renaming into this driver. This was already tried before in commit 8726bdcef62e ("spi: geni-qcom: switch to use modern name"), that's why this change is so small. Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/895f9a42691dcea037b30dcce5e61be0b44e3a25.1707324794.git.u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: cavium: Follow renaming of SPI "master" to "controller"Uwe Kleine-König2-4/+4
In commit 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller"") some functions and struct members were renamed. To not break all drivers compatibility macros were provided. To be able to remove these compatibility macros push the renaming into this driver. Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/8aa122cffa6c8c18cc3367def872f81cd9471f2a.1707324794.git.u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: cadence-quadspi: Follow renaming of SPI "master" to "controller"Uwe Kleine-König1-1/+1
In commit 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller"") some functions and struct members were renamed. To not break all drivers compatibility macros were provided. To be able to remove these compatibility macros push the renaming into this driver. Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/d741960846b7f4896eeff91a4c8c7dfa8a6f8b7b.1707324794.git.u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: cadence-quadspi: Don't emit error message on allocation errorUwe Kleine-König1-3/+2
Drivers are not supposed to emit an error message when a memory allocation fails, as the kernel is very loud in this case already anyhow. Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/8da90785395664bf17d16428f46e84b95ef5cc3b.1707324794.git.u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-08spi: bitbang: Follow renaming of SPI "master" to "controller"Uwe Kleine-König12-58/+58
In commit 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller"") some functions and struct members were renamed. To not break all drivers compatibility macros were provided. To be able to remove these compatibility macros push the renaming into the SPI bitbang controller drivers. Acked-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Link: https://lore.kernel.org/r/f7f949feb803acb8bea75798f41371a13287f4e8.1707324794.git.u.kleine-koenig@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-07spi: axi-spi-engine: move msg finalization out of irq handlerDavid Lechner1-25/+15
As a general principal, it is best to do as little as possible in an interrupt handler. This patch reworks the AXI SPI Engine driver to move timer_delete_sync() and spi_finalize_current_message() out of the interrupt handler. Instead, spi_finalize_current_message() is moved to the transfer_one_message function (similar to nearly all other SPI controllers). A completion is now used to wait for the sync interrupt that indicates that the message is complete. The watchdog timer is no longer needed since we can use the wait_for_completion_timeout() function to wait for the message to complete with the same effect. As a bonus, these changes also improve throughput of the SPI controller. For example, this was tested on a ZynqMP with a 80MHz SCLK reading 4 byte samples from an ADC. The max measured throughput increased from 26k to 28k samples per second. Reviewed-by: Nuno Sa <nuno.sa@analog.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://lore.kernel.org/r/20240207-axi-spi-engine-round-2-1-v2-2-40c0b4e85352@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-07spi: axi-spi-engine: remove use of ida for sync idDavid Lechner1-22/+6
Profiling has shown that ida_alloc_range() accounts for about 10% of the time spent in spi_sync() when using the AXI SPI Engine controller. This call is used to create a unique id for each SPI message to match to an IRQ when the message is complete. Since the core SPI code serializes messages in a message queue, we can only have one message in flight at a time, namely host->cur_msg. This means that we can use a fixed value instead of a unique id for each message since there can never be more than one message pending at a time. This patch removes the use of ida for the sync id and replaces it with a constant value. This simplifies the driver and improves performance. Reviewed-by: Nuno Sa <nuno.sa@analog.com> Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://lore.kernel.org/r/20240207-axi-spi-engine-round-2-1-v2-1-40c0b4e85352@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-07spi: drop gpf arg from __spi_split_transfer_maxsize()David Lechner2-17/+9
The __spi_split_transfer_maxsize() function has a gpf argument to allow callers to specify the type of memory allocation that needs to be used. However, this function only allocates struct spi_transfer and is not intended to be used from atomic contexts so this type should always be GFP_KERNEL, so we can just drop the argument. Some callers of these functions also passed GFP_DMA, but since only struct spi_transfer is allocated and not any tx/rx buffers, this is not actually necessary and is removed in this commit. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://lore.kernel.org/r/20240206200648.1782234-1-dlechner@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-06spi: fsl-dspi: A couple of error handlingMark Brown1-10/+5
Merge series from andy.shevchenko@gmail.com: A couple of error handling improvements here: - unshadowing error code from dmaengine_slave_config() - making error messages uniform
2024-02-05spi: spi-rockchip: Fix max_native_csLuis de Arquer1-3/+2
Signed-off-by: Luis de Arquer <luis.dearquer@inertim.com> Link: https://lore.kernel.org/r/4d18808e85b85077761c5655083f20ebfd7d3770.camel@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-05spi: spi-rockchip: Fix out of bounds array accessLuis de Arquer1-8/+0
Since spi-rockchip enables use_gpio_descriptors and the SPI_CONTROLLER_GPIO_SS flag, the spi subsytem may call set_cs() for spi devices with indexes above ROCKCHIP_SPI_MAX_CS_NUM Remove array cs_asserted[] which held a shadow copy of the state of the chip select lines with the only purpose of optimizing out rewriting a chip select line to the current state (no-op) This case is already handled by spi.c Signed-off-by: Luis de Arquer <luis.dearquer@inertim.com> Link: https://lore.kernel.org/r/d0a0c4b94f933f7f43973c34765214303ee82b77.camel@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-05spi: intel: Keep the BIOS partition inside the first chipMika Westerberg1-4/+11
If there are two flash chips connected flash regions can refer to the second chip too. In this case we may see the following warning: mtd: partition "BIOS" extends beyond the end of device "0000:00:1f.5" -- size truncated to 0x400000 For this reason, check the BIOS partition size against the chip size and make sure it stays within the that. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20240201121638.207632-2-mika.westerberg@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-05spi: intel: Add default partition and name to the second chipMika Westerberg1-1/+18
This should make it easier to identify the second chip and also allows using "mtdparts=" and the like with this chip too. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Link: https://lore.kernel.org/r/20240201121638.207632-1-mika.westerberg@linux.intel.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-05spi: axi-spi-engine: use common AXI macrosDavid Lechner1-11/+6
This avoid duplicating the same macros in multiple drivers by reusing the common AXI macros for the version register. Signed-off-by: David Lechner <dlechner@baylibre.com> Reviewed-by: Nuno Sa <nuno.sa@analog.com> Link: https://lore.kernel.org/r/20240202213132.3863124-2-dlechner@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
2024-02-05spi: bcm2835: implement ctlr->max_transfer_sizeDavid Lechner1-13/+14
The core SPI code will handle splitting transfers if needed as long as ctlr->max_transfer_size is implemented. It does this in __spi_pump_transfer_message() immediately before calling ctlr->prepare_message. So effectively, this change does not alter the behavior of the driver. Also, several peripheral drivers make use of spi_max_transfer_size(), so this should improve compatibility with those drivers. Signed-off-by: David Lechner <dlechner@baylibre.com> Link: https://lore.kernel.org/r/20240126220024.3926403-2-dlechner@baylibre.com Signed-off-by: Mark Brown <broonie@kernel.org>
generated by cgit v1.2.3 (git 2.39.0) at 2024-10-05 22:57:30 +0300