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2021-06-25Merge remote-tracking branch 'spi/for-5.14' into spi-nextMark Brown37-668/+830
2021-06-25Merge remote-tracking branch 'spi/for-5.13' into spi-linusMark Brown3-7/+15
2021-06-25Merge remote-tracking branch 'spi/for-5.12' into spi-linusMark Brown1-3/+5
2021-06-25spi: core: add dma_map_dev for dma deviceVinod Koul1-0/+4
Some controllers like qcom geni need the parent device to be used for dma mapping, so add a dma_map_dev field and let drivers fill this to be used as mapping device Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210625052213.32260-4-vkoul@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-24spi: Fix self assignment issue with ancillary->modeColin Ian King1-1/+1
There is an assignment of ancillary->mode to itself which looks dubious since the proceeding comment states that the speed and mode is taken over from the SPI main device, indicating that ancillary->mode should assigned using the value spi->mode. Fix this. Addresses-Coverity: ("Self assignment") Fixes: 0c79378c0199 ("spi: add ancillary device support") Signed-off-by: Colin Ian King <colin.king@canonical.com> Link: https://lore.kernel.org/r/20210623172300.161484-1-colin.king@canonical.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-23Merge series "Support ROCKCHIP SPI new feature" from Jon Lin ↵Mark Brown1-15/+40
<jon.lin@rock-chips.com>: Changes in v10: - The internal CS inactive function is only supported after VER 0x00110002 Changes in v9: - Conver to use CS GPIO description Changes in v8: - There is a problem with the version 7 mail format. resend it Changes in v7: - Fall back "rockchip,rv1126-spi" to "rockchip,rk3066-spi" Changes in v6: - Consider to compatibility, the "rockchip,rk3568-spi" is removed in Series-changes v5, so the commit massage should also remove the corresponding information Changes in v5: - Change to leave one compatible id rv1126, and rk3568 is compatible with rv1126 Changes in v4: - Adjust the order patches - Simply commit massage like redundancy "application" content Changes in v3: - Fix compile error which is find by Sascha in [v2,2/8] Jon Lin (6): dt-bindings: spi: spi-rockchip: add description for rv1126 spi: rockchip: add compatible string for rv1126 spi: rockchip: Set rx_fifo interrupt waterline base on transfer item spi: rockchip: Wait for STB status in slave mode tx_xfer spi: rockchip: Support cs-gpio spi: rockchip: Support SPI_CS_HIGH .../devicetree/bindings/spi/spi-rockchip.yaml | 1 + drivers/spi/spi-rockchip.c | 55 ++++++++++++++----- 2 files changed, 41 insertions(+), 15 deletions(-) -- 2.17.1
2021-06-23spi: spi-sh-msiof: : use proper DMAENGINE API for terminationWolfram Sang1-2/+2
dmaengine_terminate_all() is deprecated in favor of explicitly saying if it should be sync or async. Here, we want dmaengine_terminate_sync() because there is no other synchronization code in the driver to handle an async case. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210623095843.3228-3-wsa+renesas@sang-engineering.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-23spi: spi-rspi: : use proper DMAENGINE API for terminationWolfram Sang1-3/+3
dmaengine_terminate_all() is deprecated in favor of explicitly saying if it should be sync or async. Here, we want dmaengine_terminate_sync() because there is no other synchronization code in the driver to handle an async case. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Link: https://lore.kernel.org/r/20210623095843.3228-2-wsa+renesas@sang-engineering.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-23spi: rockchip: Support SPI_CS_HIGHJon Lin1-1/+13
1.Add standard spi-cs-high support 2.Refer to spi-controller.yaml for details Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Link: https://lore.kernel.org/r/20210621104848.19539-2-jon.lin@rock-chips.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-23spi: rockchip: Support cs-gpioJon Lin1-5/+10
1.Add standard cs-gpio support 2.Refer to spi-controller.yaml for details Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Link: https://lore.kernel.org/r/20210621104848.19539-1-jon.lin@rock-chips.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-23spi: rockchip: Wait for STB status in slave mode tx_xferJon Lin1-7/+14
After ROCKCHIP_SPI_VER2_TYPE2, SR->STB is a more accurate judgment bit for spi slave transmition. Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Link: https://lore.kernel.org/r/20210621104800.19088-5-jon.lin@rock-chips.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-23spi: rockchip: Set rx_fifo interrupt waterline base on transfer itemJon Lin1-2/+2
The error here is to calculate the width as 8 bits. In fact, 16 bits should be considered. Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Link: https://lore.kernel.org/r/20210621104800.19088-4-jon.lin@rock-chips.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-23spi: rockchip: add compatible string for rv1126Jon Lin1-0/+1
Add compatible string for rv1126 for potential applications. Signed-off-by: Jon Lin <jon.lin@rock-chips.com> Link: https://lore.kernel.org/r/20210621104800.19088-3-jon.lin@rock-chips.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-23spi: spi-sun6i: Fix chipselect/clock bugMirko Vogt1-1/+5
The current sun6i SPI implementation initializes the transfer too early, resulting in SCK going high before the transfer. When using an additional (gpio) chipselect with sun6i, the chipselect is asserted at a time when clock is high, making the SPI transfer fail. This is due to SUN6I_GBL_CTL_BUS_ENABLE being written into SUN6I_GBL_CTL_REG at an early stage. Moving that to the transfer function, hence, right before the transfer starts, mitigates that problem. Fixes: 3558fe900e8af (spi: sunxi: Add Allwinner A31 SPI controller driver) Signed-off-by: Mirko Vogt <mirko-dev|linux@nanl.de> Signed-off-by: Ralf Schlatterbeck <rsc@runtux.com> Link: https://lore.kernel.org/r/20210614144507.y3udezjfbko7eavv@runtux.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-22spi: add ancillary device supportSebastian Reichel1-31/+106
Introduce support for ancillary devices, similar to existing implementation for I2C. This is useful for devices having multiple chip-selects, for example some microcontrollers provide a normal SPI interface and a flashing SPI interface. Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com> Link: https://lore.kernel.org/r/20210621175359.126729-2-sebastian.reichel@collabora.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-15spi: stm32-qspi: Remove unused qspi field of struct stm32_qspi_flashPatrice Chotard1-2/+0
Remove struct stm32_qspi_flash's field qspi which is not used. Fixes: c530cd1d9d5e ("spi: spi-mem: add stm32 qspi controller") Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Link: https://lore.kernel.org/r/20210615090115.30702-1-patrice.chotard@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-15spi: add of_device_uevent_modalias supportMarco Felsch1-0/+4
Add OF support as already done for ACPI to take driver MODULE_DEVICE_TABLE(of, ..) into account. For example with this change a spi nor device MODALIAS changes from: MODALIAS=spi:spi-nor to MODALIAS=of:Nspi-flashT(null)Cjedec,spi-nor Signed-off-by: Marco Felsch <m.felsch@pengutronix.de> Link: https://lore.kernel.org/r/20210525091003.18228-1-m.felsch@pengutronix.de Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-14spi: meson-spicc: fix memory leak in meson_spicc_probezpershuai1-1/+1
when meson_spicc_clk_init returns failed, it should goto the out_clk label. Signed-off-by: zpershuai <zpershuai@gmail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/1623562156-21995-1-git-send-email-zpershuai@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-14spi: meson-spicc: fix a wrong goto jump for avoiding memory leak.zpershuai1-2/+4
In meson_spifc_probe function, when enable the device pclk clock is error, it should use clk_disable_unprepare to release the core clock. Signed-off-by: zpershuai <zpershuai@gmail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Link: https://lore.kernel.org/r/1623562172-22056-1-git-send-email-zpershuai@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-14spi: spi-mem: fix doc warning in spi-mem.cYang Yingliang1-1/+1
Fix the following make W=1 warning: drivers/spi/spi-mem.c:819: warning: expecting prototype for spi_mem_driver_unregister_with_owner(). Prototype was for spi_mem_driver_unregister() instead Signed-off-by: Yang Yingliang <yangyingliang@huawei.com> Link: https://lore.kernel.org/r/20210601120721.3198488-1-yangyingliang@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-14spi: spi-nxp-fspi: move the register operation after the clock enableHaibo Chen1-6/+5
Move the register operation after the clock enable, otherwise system will stuck when this driver probe. Fixes: 71d80563b076 ("spi: spi-nxp-fspi: fix fspi panic by unexpected interrupts") Signed-off-by: Haibo Chen <haibo.chen@nxp.com> Link: https://lore.kernel.org/r/1623317073-25158-1-git-send-email-haibo.chen@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-09spi: remove spi_set_cs_timing()Greg Kroah-Hartman1-73/+0
No one seems to be using this global and exported function, so remove it as it is no longer needed. Cc: Mark Brown <broonie@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://lore.kernel.org/r/20210609071918.2852069-1-gregkh@linuxfoundation.org Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-08spi: tegra20-slink: Ensure SPI controller reset is deassertedJon Hunter1-0/+5
Commit 4782c0a5dd88 ("clk: tegra: Don't deassert reset on enabling clocks") removed some legacy code for handling resets on Tegra from within the Tegra clock code. This exposed an issue in the Tegra20 slink driver where the SPI controller reset was not being deasserted as needed during probe. This is causing the Tegra30 Cardhu platform to hang on boot. Fix this by ensuring the SPI controller reset is deasserted during probe. Fixes: 4782c0a5dd88 ("clk: tegra: Don't deassert reset on enabling clocks") Signed-off-by: Jon Hunter <jonathanh@nvidia.com> Link: https://lore.kernel.org/r/20210608071518.93037-1-jonathanh@nvidia.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-07spi: hisi-kunpeng: Add debugfs supportJay Fang1-1/+50
This patch uses debugfs_regset32 interface to create the registers dump file. Use it instead of creating a generic debugfs file with manually written read callback function. With these entries, users can check all the SPI controller registers during run time. Signed-off-by: Jay Fang <f.fangjian@huawei.com> Link: https://lore.kernel.org/r/1622789718-13977-1-git-send-email-f.fangjian@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-04spi: stm32-qspi: Fix W=1 build warningPatrice Chotard1-0/+1
Fix the following compilation warning using W=1 build: arm-linux-gnueabi-ld: drivers/spi/spi-stm32-qspi.o: in function `stm32_qspi_poll_status': Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Link: https://lore.kernel.org/r/20210604075009.25914-1-patrice.chotard@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-03Merge series "MTD: spinand: Add spi_mem_poll_status() support" from ↵Mark Brown2-8/+164
<patrice.chotard@foss.st.com> Patrice Chotard <patrice.chotard@foss.st.com>: From: Patrice Chotard <patrice.chotard@foss.st.com> This series adds support for the spi_mem_poll_status() spinand interface. Some QSPI controllers allows to poll automatically memory status during operations (erase, read or write). This allows to offload the CPU for this task. STM32 QSPI is supporting this feature, driver update are also part of this series. Changes in v5: - Update spi_mem_read_status() description. - Update poll_status() description API by indicating that data buffer is filled with last status value. - Update timeout parameter by timeout_ms in spi_mem_poll_status() prototype. - Remove parenthesys arount -EINVAL in spi_mem_poll_status(). - Add missing spi_mem_supports_op() call in stm32_qspi_poll_status(). - Add Boris Reviewed-by for patch 1 and 2. Changes in v4: - Remove init_completion() from spi_mem_probe() added in v2. - Add missing static for spi_mem_read_status(). - Check if operation in spi_mem_poll_status() is a READ. - Update patch 2 commit message. - Add comment which explains how delays has been calculated. - Rename SPINAND_STATUS_TIMEOUT_MS to SPINAND_WAITRDY_TIMEOUT_MS. Chnages in v3: - Add spi_mem_read_status() which allows to read 8 or 16 bits status. - Add initial_delay_us and polling_delay_us parameters to spi_mem_poll_status(). and also to poll_status() callback. - Move spi_mem_supports_op() in SW-based polling case. - Add delay before invoquing read_poll_timeout(). - Remove the reinit/wait_for_completion() added in v2. - Add initial_delay_us and polling_delay_us parameters to spinand_wait(). - Add SPINAND_READ/WRITE/ERASE/RESET_INITIAL_DELAY_US and SPINAND_READ/WRITE/ERASE/RESET_POLL_DELAY_US defines. - Remove spi_mem_finalize_op() API added in v2. Changes in v2: - Indicates the spi_mem_poll_status() timeout unit - Use 2-byte wide status register - Add spi_mem_supports_op() call in spi_mem_poll_status() - Add completion management in spi_mem_poll_status() - Add offload/non-offload case management in spi_mem_poll_status() - Optimize the non-offload case by using read_poll_timeout() - mask and match stm32_qspi_poll_status()'s parameters are 2-byte wide - Make usage of new spi_mem_finalize_op() API in stm32_qspi_wait_poll_status() Patrice Chotard (3): spi: spi-mem: add automatic poll status functions mtd: spinand: use the spi-mem poll status APIs spi: stm32-qspi: add automatic poll status feature drivers/mtd/nand/spi/core.c | 45 +++++++++++++------ drivers/spi/spi-mem.c | 86 ++++++++++++++++++++++++++++++++++++ drivers/spi/spi-stm32-qspi.c | 86 ++++++++++++++++++++++++++++++++---- include/linux/mtd/spinand.h | 22 +++++++++ include/linux/spi/spi-mem.h | 16 +++++++ 5 files changed, 234 insertions(+), 21 deletions(-) base-commit: 6efb943b8616ec53a5e444193dccf1af9ad627b5 -- 2.17.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
2021-06-03spi: atmel: Reduce spin lock usageDan Sneddon1-15/+4
The current implementation of the driver holds a spin lock for the duration of the transfer, releasing it only to enable interrupts for short periods of time. As this would prevent any interrupt from happening, this could cause system performance issues every time a SPI message is sent. Since the spi core now handles message syncronization we can reduce the amount of time the spin-lock is held to the regions where both the calling thread and the interrupt might interract. Signed-off-by: Dan Sneddon <dan.sneddon@microchip.com> Link: https://lore.kernel.org/r/20210602160816.4890-2-dan.sneddon@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-03spi: atmel: Switch to transfer_one transfer methodDan Sneddon1-91/+33
Switch from using our own transfer_one_message routine to using the one provided by the SPI core. Signed-off-by: Dan Sneddon <dan.sneddon@microchip.com> Link: https://lore.kernel.org/r/20210602160816.4890-1-dan.sneddon@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-03spi: stm32-qspi: add automatic poll status featurePatrice Chotard1-8/+78
STM32 QSPI is able to automatically poll a specified register inside the memory and relieve the CPU from this task. As example, when erasing a large memory area, we got cpu load equal to 50%. This patch allows to perform the same operation with a cpu load around 2%. Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Link: https://lore.kernel.org/r/20210518162754.15940-4-patrice.chotard@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-03spi: spi-mem: add automatic poll status functionsPatrice Chotard1-0/+86
With STM32 QSPI, it is possible to poll the status register of the device. This could be done to offload the CPU during an operation (erase or program a SPI NAND for example). spi_mem_poll_status API has been added to handle this feature. This new function take care of the offload/non-offload cases. For the non-offload case, use read_poll_timeout() to poll the status in order to release CPU during this phase. For example, previously, when erasing large area, in non-offload case, CPU load can reach ~50%, now it decrease to ~35%. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Link: https://lore.kernel.org/r/20210518162754.15940-2-patrice.chotard@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-03spi: stm32-qspi: Always wait BUSY bit to be cleared in stm32_qspi_wait_cmd()Patrice Chotard1-1/+4
In U-boot side, an issue has been encountered when QSPI source clock is running at low frequency (24 MHz for example), waiting for TCF bit to be set didn't ensure that all data has been send out the FIFO, we should also wait that BUSY bit is cleared. To prevent similar issue in kernel driver, we implement similar behavior by always waiting BUSY bit to be cleared. Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Link: https://lore.kernel.org/r/20210603073421.8441-1-patrice.chotard@foss.st.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-02spi: bcm2835: Allow arbitrary number of slavesLukas Wunner1-85/+119
Since commit 571e31fa60b3 ("spi: bcm2835: Cache CS register value for ->prepare_message()"), the number of slaves has been limited by a compile-time constant. This was necessitated by statically-sized arrays in the driver private data which contain per-slave register values. As suggested by Mark, move those register values to a per-slave controller_state which is allocated on ->setup and freed on ->cleanup. The limitation on the number of slaves is thus lifted. Signed-off-by: Lukas Wunner <lukas@wunner.de> Cc: Joe Burmeister <joe.burmeister@devtank.co.uk> Cc: Phil Elwell <phil@raspberrypi.com> Link: https://lore.kernel.org/r/a847c01f09400801e74e0630bf5a0197591554da.1622150204.git.lukas@wunner.de Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-02spi: spi-zynq-qspi: Fix some wrong goto jumps & missing error codezpershuai1-3/+4
In zynq_qspi_probe function, when enable the device clock is done, the return of all the functions should goto the clk_dis_all label. If num_cs is not right then this should return a negative error code but currently it returns success. Signed-off-by: zpershuai <zpershuai@gmail.com> Link: https://lore.kernel.org/r/1622110857-21812-1-git-send-email-zpershuai@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-06-01Merge branch 'for-5.13' of ↵Mark Brown10-32/+100
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-5.14
2021-06-01spi: Cleanup on failure of initial setupLukas Wunner5-19/+54
Commit c7299fea6769 ("spi: Fix spi device unregister flow") changed the SPI core's behavior if the ->setup() hook returns an error upon adding an spi_device: Before, the ->cleanup() hook was invoked to free any allocations that were made by ->setup(). With the commit, that's no longer the case, so the ->setup() hook is expected to free the allocations itself. I've identified 5 drivers which depend on the old behavior and am fixing them up hereinafter: spi-bitbang.c spi-fsl-spi.c spi-omap-uwire.c spi-omap2-mcspi.c spi-pxa2xx.c Importantly, ->setup() is not only invoked on spi_device *addition*: It may subsequently be called to *change* SPI parameters. If changing these SPI parameters fails, freeing memory allocations would be wrong. That should only be done if the spi_device is finally destroyed. I am therefore using a bool "initial_setup" in 4 of the affected drivers to differentiate between the invocation on *adding* the spi_device and any subsequent invocations: spi-bitbang.c spi-fsl-spi.c spi-omap-uwire.c spi-omap2-mcspi.c In spi-pxa2xx.c, it seems the ->setup() hook can only fail on spi_device addition, not any subsequent calls. It therefore doesn't need the bool. It's worth noting that 5 other drivers already perform a cleanup if the ->setup() hook fails. Before c7299fea6769, they caused a double-free if ->setup() failed on spi_device addition. Since the commit, they're fine. These drivers are: spi-mpc512x-psc.c spi-pl022.c spi-s3c64xx.c spi-st-ssc4.c spi-tegra114.c (spi-pxa2xx.c also already performs a cleanup, but only in one of several error paths.) Fixes: c7299fea6769 ("spi: Fix spi device unregister flow") Signed-off-by: Lukas Wunner <lukas@wunner.de> Cc: Saravana Kannan <saravanak@google.com> Acked-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> # pxa2xx Link: https://lore.kernel.org/r/f76a0599469f265b69c371538794101fa37b5536.1622149321.git.lukas@wunner.de Signed-off-by: Mark Brown <broonie@kernel.org>
2021-05-26spi: Enable tracing of the SPI setup CS selectionAndy Shevchenko1-0/+4
It is helpful to see what state of CS signal was during one or another SPI operation. All the same for SPI setup. Enable tracing of the SPI setup and CS selection. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Message-Id: <20210526195655.75691-1-andriy.shevchenko@linux.intel.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2021-05-24spi: ath79: set number of chipselect linesDavid Bauer1-0/+1
All chipsets from AR7100 up to QCA9563 have three dedicated chipselect lines for the integrated SPI controller. Set the number of chipselect lines available on the controller to this value. Signed-off-by: David Bauer <mail@david-bauer.net> Link: https://lore.kernel.org/r/20210522074453.39299-2-mail@david-bauer.net Signed-off-by: Mark Brown <broonie@kernel.org>
2021-05-24spi: ath79: drop platform dataDavid Bauer1-8/+0
The ath79 platform has been converted to pure OF. The platform data is not needed anymore because of this. Signed-off-by: David Bauer <mail@david-bauer.net> Link: https://lore.kernel.org/r/20210522074453.39299-1-mail@david-bauer.net Signed-off-by: Mark Brown <broonie@kernel.org>
2021-05-24spi: bcm2835: Fix out-of-bounds access with more than 4 slavesLukas Wunner1-2/+8
Commit 571e31fa60b3 ("spi: bcm2835: Cache CS register value for ->prepare_message()") limited the number of slaves to 3 at compile-time. The limitation was necessitated by a statically-sized array prepare_cs[] in the driver private data which contains a per-slave register value. The commit sought to enforce the limitation at run-time by setting the controller's num_chipselect to 3: Slaves with a higher chipselect are rejected by spi_add_device(). However the commit neglected that num_chipselect only limits the number of *native* chipselects. If GPIO chipselects are specified in the device tree for more than 3 slaves, num_chipselect is silently raised by of_spi_get_gpio_numbers() and the result are out-of-bounds accesses to the statically-sized array prepare_cs[]. As a bandaid fix which is backportable to stable, raise the number of allowed slaves to 24 (which "ought to be enough for anybody"), enforce the limitation on slave ->setup and revert num_chipselect to 3 (which is the number of native chipselects supported by the controller). An upcoming for-next commit will allow an arbitrary number of slaves. Fixes: 571e31fa60b3 ("spi: bcm2835: Cache CS register value for ->prepare_message()") Reported-by: Joe Burmeister <joe.burmeister@devtank.co.uk> Signed-off-by: Lukas Wunner <lukas@wunner.de> Cc: stable@vger.kernel.org # v5.4+ Cc: Phil Elwell <phil@raspberrypi.com> Link: https://lore.kernel.org/r/75854affc1923309fde05e47494263bde73e5592.1621703210.git.lukas@wunner.de Signed-off-by: Mark Brown <broonie@kernel.org>
2021-05-21spi: pxa2xx: Fix inconsistent indentingJiapeng Chong1-1/+1
Eliminate the follow smatch warning: drivers/spi/spi-pxa2xx-pci.c:260 pxa2xx_spi_pci_probe() warn: inconsistent indenting. Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Jiapeng Chong <jiapeng.chong@linux.alibaba.com> Link: https://lore.kernel.org/r/1621590465-73594-1-git-send-email-jiapeng.chong@linux.alibaba.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-05-21spi: sc18is602: implement .max_{transfer,message}_size() for the controllerVladimir Oltean1-0/+7
Allow SPI peripherals attached to this controller to know what is the maximum transfer size and message size, so they can limit their transfer lengths properly in case they are otherwise capable of larger transfer sizes. For the sc18is602, this is 200 bytes in both cases, since as far as I understand, it isn't possible to tell the controller to keep the chip select asserted after the STOP command is sent. The controller can support SPI messages larger than 200 bytes if cs_change is set for individual transfers such that the portions with chip select asserted are never longer than 200 bytes. What is not supported is just SPI messages with a continuous chip select larger than 200. I don't think it is possible to express this using the current API, so drivers which do send SPI messages with cs_change can safely just look at the max_transfer_size limit. An example of user for this is sja1105_xfer() in drivers/net/dsa/sja1105/sja1105_spi.c which sends by default 64 * 4 = 256 byte transfers. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://lore.kernel.org/r/20210520131238.2903024-3-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-05-21spi: sc18is602: don't consider the chip select byte in sc18is602_check_transferVladimir Oltean1-1/+1
For each spi_message, the sc18is602 I2C-to-SPI bridge driver checks the length of each spi_transfer against 200 (the size of the chip's internal buffer) minus hw->tlen (the number of bytes transferred so far). The first byte of the transferred data is the Function ID (the SPI slave's chip select) and as per the documentation of the chip: https://www.nxp.com/docs/en/data-sheet/SC18IS602B.pdf the data buffer is up to 200 bytes deep _without_ accounting for the Function ID byte. However, in sc18is602_txrx(), the driver keeps the Function ID as part of the buffer, and increments hw->tlen from 0 to 1. Combined with the check in sc18is602_check_transfer, this prevents us from issuing a transfer that has exactly 200 bytes in size, but only 199. Adjust the check function to reflect that the Function ID is not part of the 200 byte deep data buffer. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Link: https://lore.kernel.org/r/20210520131238.2903024-2-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-05-21Merge series "drivers: spi - add parenthesis for sizeof" from Zhiqi Song ↵Mark Brown7-10/+10
<songzhiqi1@huawei.com>: This patchset fixes missing parentheses of sizeof reported by checkpatch.pl under drivers/spi/. Zhiqi Song (7): spi: lm70llp: add parenthesis for sizeof spi: mpc512x-psc: add parenthesis for sizeof spi: mpc52xx: add parenthesis for sizeof spi: mpc52xx-psc: add parenthesis for sizeof spi: omap2-mcspi: add parenthesis for sizeof spi: omap-uwire: add parenthesis for sizeof spi: ppc4xx: add parenthesis for sizeof drivers/spi/spi-lm70llp.c | 2 +- drivers/spi/spi-mpc512x-psc.c | 4 ++-- drivers/spi/spi-mpc52xx-psc.c | 4 ++-- drivers/spi/spi-mpc52xx.c | 2 +- drivers/spi/spi-omap-uwire.c | 2 +- drivers/spi/spi-omap2-mcspi.c | 2 +- drivers/spi/spi-ppc4xx.c | 4 ++-- 7 files changed, 10 insertions(+), 10 deletions(-) -- 2.7.4
2021-05-20spi: ppc4xx: add parenthesis for sizeofZhiqi Song1-2/+2
Fix missing parenthesis of sizeof reported by checkpatch.pl: WARNING: sizeof *pp should be sizeof(*pp). The kernel coding style suggests thinking of sizeof as a function and add parenthesis. Signed-off-by: Zhiqi Song <songzhiqi1@huawei.com> Link: https://lore.kernel.org/r/1621301902-64158-8-git-send-email-songzhiqi1@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-05-20spi: omap-uwire: add parenthesis for sizeofZhiqi Song1-1/+1
Fix missing parenthesis of sizeof reported by checkpatch.pl: WARNING: sizeof *pp should be sizeof(*pp). The kernel coding style suggests thinking of sizeof as a function and add parenthesis. Signed-off-by: Zhiqi Song <songzhiqi1@huawei.com> Link: https://lore.kernel.org/r/1621301902-64158-7-git-send-email-songzhiqi1@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-05-20spi: omap2-mcspi: add parenthesis for sizeofZhiqi Song1-1/+1
Fix missing parenthesis of sizeof reported by checkpatch.pl: WARNING: sizeof *pp should be sizeof(*pp). The kernel coding style suggests thinking of sizeof as a function and add parenthesis. Signed-off-by: Zhiqi Song <songzhiqi1@huawei.com> Link: https://lore.kernel.org/r/1621301902-64158-6-git-send-email-songzhiqi1@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-05-20spi: mpc52xx-psc: add parenthesis for sizeofZhiqi Song1-2/+2
Fix missing parenthesis of sizeof reported by checkpatch.pl: WARNING: sizeof *pp should be sizeof(*pp). The kernel coding style suggests thinking of sizeof as a function and add parenthesis. Signed-off-by: Zhiqi Song <songzhiqi1@huawei.com> Link: https://lore.kernel.org/r/1621301902-64158-5-git-send-email-songzhiqi1@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-05-20spi: mpc52xx: add parenthesis for sizeofZhiqi Song1-1/+1
Fix missing parenthesis of sizeof reported by checkpatch.pl: WARNING: sizeof *pp should be sizeof(*pp). The kernel coding style suggests thinking of sizeof as a function and add parenthesis. Signed-off-by: Zhiqi Song <songzhiqi1@huawei.com> Link: https://lore.kernel.org/r/1621301902-64158-4-git-send-email-songzhiqi1@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-05-20spi: mpc512x-psc: add parenthesis for sizeofZhiqi Song1-2/+2
Fix missing parenthesis of sizeof reported by checkpatch.pl: WARNING: sizeof *pp should be sizeof(*pp). The kernel coding style suggests thinking of sizeof as a function and add parenthesis. Signed-off-by: Zhiqi Song <songzhiqi1@huawei.com> Link: https://lore.kernel.org/r/1621301902-64158-3-git-send-email-songzhiqi1@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-05-20spi: lm70llp: add parenthesis for sizeofZhiqi Song1-1/+1
Fix missing parenthesis of sizeof reported by checkpatch.pl: WARNING: sizeof *pp should be sizeof(*pp). The kernel coding style suggests thinking of sizeof as a function and add parenthesis. Cc: Kaiwan N Billimoria <kaiwan@designergraphix.com> Signed-off-by: Zhiqi Song <songzhiqi1@huawei.com> Link: https://lore.kernel.org/r/1621301902-64158-2-git-send-email-songzhiqi1@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
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