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path: root/include/dt-bindings/clock/exynos7-clk.h
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2018-10-15dt-bindings: clock: samsung: Add SPDX license identifiersKrzysztof Kozlowski1-5/+2
Replace GPL license statements with SPDX license identifiers (GPL-2.0). Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Rob Herring <robh@kernel.org>
2015-09-15clk: samsung: exynos7: Add required clock tree for UFSAlim Akhtar1-2/+22
Adding required mux/div/gate clocks for UFS controller present on Exynos7. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15clk: samsung: exynos7: Correct CMU_FSYS1 clocks namesAlim Akhtar1-1/+2
This patch renames CMU_FSYS1 clocks names to match with user manual. And also adds missing gate clock for aclk_fsys1_200. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15clk: samsung: exynos7: Correct CMU_FSYS0 clocks namesAlim Akhtar1-1/+2
This patch renames CMU_FSYS0 clocks names to match with user manual. And also adds missing gate clock for aclk_fsys0_200. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15clk: samsung: exynos7: Correct CMU_PERIC1 clocks namesAlim Akhtar1-1/+2
This patch renames CMU_PERIC1 clocks names to match with user manual. And also adds missing gate clock for aclk_peric1_66. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15clk: samsung: exynos7: Correct CMU_PERIC0 clocks namesAlim Akhtar1-1/+2
This patch renames CMU_PERIC0 clocks names to match with user manual. And also adds missing gate clock for aclk_peric0_66. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-09-15clk: samsung: exynos7: Adds missing clocks gates of CMU_TOPCAlim Akhtar1-1/+12
This adds some of the missing GATE clocks of CMU_TOPC block. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-01-15clk: samsung: exynos7: add clocks for audio blockPadmavathi Venna1-3/+21
Add required clk support for I2S, PCM and SPDIF. Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Reviewed-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-01-15clk: samsung: exynos7: add clocks for SPI blockPadmavathi Venna1-2/+17
Add clock support for 5 SPI channels. Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2015-01-15clk: samsung: exynos7: add gate clock for DMA blockPadmavathi Venna1-1/+3
Add support for PDMA0 and PDMA1 gate clks. Signed-off-by: Padmavathi Venna <padma.v@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-12-23clk: samsung: exynos7: Add required clock tree for USBVivek Gautam1-1/+8
Adding required gate clocks for USB3.0 DRD controller present on Exynos7. Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-12-23clk: samsung: exynos7: Add clocks for MSCL blockTony K Nadackal1-1/+39
Add clock support for the MSCL block for Exynos7. Signed-off-by: Tony K Nadackal <tony.kn@samsung.com> Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-10-31clk: samsung: exynos7: add gate clock for ADC blockAbhilash Kesavan1-1/+2
Add clock support for the ADC interface in Exynos7. Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-10-31clk: samsung: exynos7: add gate clocks for WDT, TMU and PWM blocksNaveen Krishna Ch1-2/+7
Add clock support for the watchdog timer, pwm timer and thermal management unit IPs in Exynos7. Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com> Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-10-31clk: samsung: exynos7: add clocks for RTC blockNaveen Krishna Ch1-1/+6
Add clock support for the RTC block in Exynos7. Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com> Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-10-31clk: samsung: exynos7: add clocks for MMC blockNaveen Krishna Ch1-0/+20
Exynos7 supports 3 MMC channels, add the MMC gate clocks to support them. Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com> Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-10-31clk: samsung: exynos7: add clocks for I2C blockNaveen Krishna Ch1-2/+14
Exynos7 supports 12 I2C channels, add the I2C gate clocks to support them. Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com> Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
2014-10-31clk: samsung: add initial clock support for Exynos7 SoCNaveen Krishna Ch1-0/+49
Add initial clock support for Exynos7 SoC which is required to bring up platforms based on Exynos7. Signed-off-by: Naveen Krishna Ch <naveenkrishna.ch@gmail.com> Signed-off-by: Abhilash Kesavan <a.kesavan@samsung.com> Reviewed-by: Thomas Abraham <thomas.ab@samsung.com> Tested-by: Thomas Abraham <thomas.ab@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>