| Age | Commit message (Collapse) | Author | Files | Lines | |
|---|---|---|---|---|---|
| 2019-02-06 | dt-bindings: clock: add clock for MT2712 | Weiyi Lu | 1 | -1/+2 | |
| Add new clock according to 3rd ECO design change. It's the parent clock of audio clock mux. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> | |||||
| 2018-03-20 | dt-bindings: clock: add clocks for MT2712 | Weiyi Lu | 1 | -2/+10 | |
| add new clocks according to ECO design change Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Reviewed-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@kernel.org> | |||||
| 2017-11-02 | clk: mediatek: Add dt-bindings for MT2712 clocks | weiyi.lu@mediatek.com | 1 | -0/+427 | |
| Add MT2712 clock dt-bindings, include topckgen, apmixedsys, infracfg, pericfg, mcucfg and subsystem clocks. Signed-off-by: Weiyi Lu <weiyi.lu@mediatek.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> | |||||
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